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abc
Commit 00dc0f3d by Alan Mishchenko
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Version abc70406

parent 028138a7
Showing with 130 additions and 14 deletions
abc.rc
......@@ -30,6 +30,7 @@ alias fs fraig_sweep
alias fsto fraig_store
alias fres fraig_restore
alias ft fraig_trust
alias lp lutpack
alias pex print_exdc -d
alias pf print_factor
alias pfan print_fanio
......@@ -165,3 +166,5 @@ alias trec12 "rec_start -K 12; r i10.blif; st; rec_add; rec_use"
alias tst4 "r i10_if4.blif; st; ps; r x/rec4_.blif; st; rec_start; r i10_if4.blif; st -r; ps; cec"
alias tst4n "r i10_if4.blif; st; ps; r 5npn/all_functions.aig; st; rec_start; r i10_if4.blif; st -r; ps; cec"
alias tst6 "r i10_if6.blif; st; ps; r x/rec6_16_.blif; st; rec_start; r i10_if6.blif; st -r; ps; cec"
src/aig/hop/hop.h
......@@ -314,6 +314,7 @@ extern void Hop_TableProfile( Hop_Man_t * p );
/*=== aigUtil.c =========================================================*/
extern void Hop_ManIncrementTravId( Hop_Man_t * p );
extern void Hop_ManCleanData( Hop_Man_t * p );
extern void Hop_ObjCleanData_rec( Hop_Obj_t * pObj );
extern void Hop_ObjCollectMulti( Hop_Obj_t * pFunc, Vec_Ptr_t * vSuper );
extern int Hop_ObjIsMuxType( Hop_Obj_t * pObj );
extern int Hop_ObjRecognizeExor( Hop_Obj_t * pObj, Hop_Obj_t ** ppFan0, Hop_Obj_t ** ppFan1 );
......
src/aig/hop/hopUtil.c
......@@ -48,7 +48,7 @@ void Hop_ManIncrementTravId( Hop_Man_t * p )
/**Function*************************************************************
Synopsis [Sets the DFS ordering of the nodes.]
Synopsis [Cleans the data pointers for the nodes.]
Description []
......@@ -73,6 +73,29 @@ void Hop_ManCleanData( Hop_Man_t * p )
/**Function*************************************************************
Synopsis [Recursively cleans the data pointers in the cone of the node.]
Description [Applicable to small AIGs only because no caching is performed.]
SideEffects []
SeeAlso []
***********************************************************************/
void Hop_ObjCleanData_rec( Hop_Obj_t * pObj )
{
assert( !Hop_IsComplement(pObj) );
assert( !Hop_ObjIsPo(pObj) );
if ( Hop_ObjIsAnd(pObj) )
{
Hop_ObjCleanData_rec( Hop_ObjFanin0(pObj) );
Hop_ObjCleanData_rec( Hop_ObjFanin1(pObj) );
}
pObj->pData = NULL;
}
/**Function*************************************************************
Synopsis [Detects multi-input gate rooted at this node.]
Description []
......
src/base/abc/abc.h
......@@ -787,6 +787,7 @@ extern Vec_Ptr_t * Abc_NodeCollectTfoCands( Abc_ManCut_t * p, Abc_Obj_t *
extern int Abc_NodeMffcSize( Abc_Obj_t * pNode );
extern int Abc_NodeMffcSizeSupp( Abc_Obj_t * pNode );
extern int Abc_NodeMffcSizeStop( Abc_Obj_t * pNode );
extern int Abc_NodeMffcLabelAig( Abc_Obj_t * pNode );
extern int Abc_NodeMffcLabel( Abc_Obj_t * pNode );
extern void Abc_NodeMffsConeSupp( Abc_Obj_t * pNode, Vec_Ptr_t * vCone, Vec_Ptr_t * vSupp );
extern int Abc_NodeDeref_rec( Abc_Obj_t * pNode );
......
src/base/abc/abcCheck.c
......@@ -523,7 +523,7 @@ bool Abc_NtkCheckNode( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode )
// the node should have a function assigned unless it is an AIG
if ( pNode->pData == NULL )
{
fprintf( stdout, "NodeCheck: An internal node \"%s\" does not have a logic function.\n", Abc_ObjName(pNode) );
fprintf( stdout, "NodeCheck: An internal node \"%s\" does not have a logic function.\n", Abc_NtkIsNetlist(pNode->pNtk)? Abc_ObjName(Abc_ObjFanout0(pNode)) : Abc_ObjName(pNode) );
return 0;
}
// the netlist and SOP logic network should have SOPs
......
src/base/abc/abcRefs.c
......@@ -94,7 +94,7 @@ int Abc_NodeMffcSizeStop( Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
int Abc_NodeMffcLabel( Abc_Obj_t * pNode )
int Abc_NodeMffcLabelAig( Abc_Obj_t * pNode )
{
int nConeSize1, nConeSize2;
assert( Abc_NtkIsStrash(pNode->pNtk) );
......@@ -279,6 +279,7 @@ void Abc_NodeMffsConeSupp_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vCone, Vec_Ptr_t *
Abc_NodeMffsConeSupp_rec( pFanin, vCone, vSupp, 0 );
// collect the internal node
if ( vCone ) Vec_PtrPush( vCone, pNode );
// printf( "%d ", pNode->Id );
}
/**Function*************************************************************
......@@ -300,6 +301,7 @@ void Abc_NodeMffsConeSupp( Abc_Obj_t * pNode, Vec_Ptr_t * vCone, Vec_Ptr_t * vSu
if ( vSupp ) Vec_PtrClear( vSupp );
Abc_NtkIncrementTravId( pNode->pNtk );
Abc_NodeMffsConeSupp_rec( pNode, vCone, vSupp, 1 );
// printf( "\n" );
}
/**Function*************************************************************
......@@ -389,6 +391,60 @@ Vec_Ptr_t * Abc_NodeMffsInsideCollect( Abc_Obj_t * pNode )
return vInside;
}
/**Function*************************************************************
Synopsis [Collects the internal and boundary nodes in the derefed MFFC.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NodeMffcLabel_rec( Abc_Obj_t * pNode, int fTopmost )
{
Abc_Obj_t * pFanin;
int i;
// add to the new support nodes
if ( !fTopmost && (Abc_ObjIsCi(pNode) || pNode->vFanouts.nSize > 0) )
return;
// skip visited nodes
if ( Abc_NodeIsTravIdCurrent(pNode) )
return;
Abc_NodeSetTravIdCurrent(pNode);
// recur on the children
Abc_ObjForEachFanin( pNode, pFanin, i )
Abc_NodeMffcLabel_rec( pFanin, 0 );
// collect the internal node
// printf( "%d ", pNode->Id );
}
/**Function*************************************************************
Synopsis [Collects the internal nodes of the MFFC limited by cut.]
Description []
SideEffects [Increments the trav ID and marks visited nodes.]
SeeAlso []
***********************************************************************/
int Abc_NodeMffcLabel( Abc_Obj_t * pNode )
{
int Count1, Count2;
// dereference the node
Count1 = Abc_NodeDeref_rec( pNode );
// collect the nodes inside the MFFC
Abc_NtkIncrementTravId( pNode->pNtk );
Abc_NodeMffcLabel_rec( pNode, 1 );
// reference it back
Count2 = Abc_NodeRef_rec( pNode );
assert( Count1 == Count2 );
return Count1;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
......
src/base/abci/abc.c
......@@ -63,7 +63,7 @@ static int Abc_CommandSweep ( Abc_Frame_t * pAbc, int argc, char ** arg
static int Abc_CommandFastExtract ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandDisjoint ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandImfs ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandLutjam ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandLutpack ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandRewrite ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandRefactor ( Abc_Frame_t * pAbc, int argc, char ** argv );
......@@ -218,7 +218,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Synthesis", "fx", Abc_CommandFastExtract, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "dsd", Abc_CommandDisjoint, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "imfs", Abc_CommandImfs, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "lutjam", Abc_CommandLutjam, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "lutpack", Abc_CommandLutpack, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "rewrite", Abc_CommandRewrite, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "refactor", Abc_CommandRefactor, 1 );
......@@ -328,6 +328,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
// Abc_NtkPrint256();
// Kit_TruthCountMintermsPrecomp();
// Kit_DsdPrecompute4Vars();
}
/**Function*************************************************************
......@@ -1536,7 +1537,7 @@ int Abc_CommandPrintDsd( Abc_Frame_t * pAbc, int argc, char ** argv )
// convert it to truth table
{
Abc_Obj_t * pObj = Abc_ObjFanin0( Abc_NtkPo(pNtk, 0) );
Vec_Int_t * vMemory = Vec_IntAlloc( 100 );
Vec_Int_t * vMemory = Vec_IntAlloc( 10000 );
unsigned * pTruth;
if ( !Abc_ObjIsNode(pObj) )
{
......@@ -1548,7 +1549,7 @@ int Abc_CommandPrintDsd( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pErr, "Currently works only for up to 8 inputs.\n" );
return 1;
}
pTruth = Abc_ConvertAigToTruth( pNtk->pManFunc, Hop_Regular(pObj->pData), Abc_ObjFaninNum(pObj), vMemory, 1 );
pTruth = Abc_ConvertAigToTruth( pNtk->pManFunc, Hop_Regular(pObj->pData), Abc_ObjFaninNum(pObj), vMemory, 0 );
if ( Hop_IsComplement(pObj->pData) )
Extra_TruthNot( pTruth, pTruth, Abc_ObjFaninNum(pObj) );
Extra_PrintBinary( stdout, pTruth, 1 << Abc_ObjFaninNum(pObj) );
......@@ -2889,7 +2890,7 @@ usage:
SeeAlso []
***********************************************************************/
int Abc_CommandLutjam( Abc_Frame_t * pAbc, int argc, char ** argv )
int Abc_CommandLutpack( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk;
......@@ -2907,7 +2908,7 @@ int Abc_CommandLutjam( Abc_Frame_t * pAbc, int argc, char ** argv )
// set defaults
memset( pPars, 0, sizeof(Lut_Par_t) );
pPars->nLutsMax = 4; // (N) the maximum number of LUTs in the structure
pPars->nLutsOver = 1; // (Q) the maximum number of LUTs not in the MFFC
pPars->nLutsOver = 2; // (Q) the maximum number of LUTs not in the MFFC
pPars->nVarsShared = 0; // (S) the maximum number of shared variables (crossbars)
pPars->fVerbose = 0;
pPars->fVeryVerbose = 0;
......@@ -2982,7 +2983,7 @@ int Abc_CommandLutjam( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
fprintf( pErr, "usage: lutjam [-N <num>] [-Q <num>] [-S <num>] [-vwh]\n" );
fprintf( pErr, "usage: lutpack [-N <num>] [-Q <num>] [-S <num>] [-vwh]\n" );
fprintf( pErr, "\t performs \"rewriting\" for LUT networks\n" );
fprintf( pErr, "\t-N <num> : the max number of LUTs in the structure (2 <= num) [default = %d]\n", pPars->nLutsMax );
fprintf( pErr, "\t-Q <num> : the max number of LUTs not in MFFC (0 <= num) [default = %d]\n", pPars->nLutsOver );
......
src/base/abci/abcReconv.c
......@@ -712,7 +712,7 @@ Vec_Ptr_t * Abc_NodeCollectTfoCands( Abc_ManCut_t * p, Abc_Obj_t * pRoot, Vec_Pt
// mark MFFC
if ( pRoot )
Abc_NodeMffcLabel( pRoot );
Abc_NodeMffcLabelAig( pRoot );
// go through the levels up
Vec_PtrClear( p->vNodesTfo );
......
src/base/abci/abcRefactor.c
......@@ -248,7 +248,7 @@ p->timeFact += clock() - clk;
pFanin->vFanouts.nSize++;
// label MFFC with current traversal ID
Abc_NtkIncrementTravId( pNode->pNtk );
nNodesSaved = Abc_NodeMffcLabel( pNode );
nNodesSaved = Abc_NodeMffcLabelAig( pNode );
// unmark the fanin boundary and set the fanins as leaves in the form
Vec_PtrForEachEntry( vFanins, pFanin, i )
{
......
src/base/abci/abcRestruct.c
......@@ -391,7 +391,7 @@ p->timeDsd += clock() - clk;
pLeaf->vFanouts.nSize++;
// label MFFC with current traversal ID
Abc_NtkIncrementTravId( pRoot->pNtk );
nNodesSaved = Abc_NodeMffcLabel( pRoot );
nNodesSaved = Abc_NodeMffcLabelAig( pRoot );
// unmark the fanin boundary and set the fanins as leaves in the form
Vec_PtrForEachEntry( p->vLeaves, pLeaf, i )
pLeaf->vFanouts.nSize--;
......
src/base/ver/verCore.c
......@@ -1203,6 +1203,12 @@ int Ver_ParseAssign( Ver_Man_t * pMan, Abc_Ntk_t * pNtk )
Vec_PtrPush( pMan->vNames, pEquation );
// get the buffer
pFunc = (Hop_Obj_t *)Mio_LibraryReadBuf(Abc_FrameReadLibGen());
if ( pFunc == NULL )
{
sprintf( pMan->sError, "Reading assign statement for node %s has failed because the genlib library has no buffer.", Abc_ObjName(pNet) );
Ver_ParsePrintErrorMessage( pMan );
return 0;
}
}
}
else
......@@ -1391,6 +1397,7 @@ int Ver_ParseGate( Ver_Man_t * pMan, Abc_Ntk_t * pNtk, Mio_Gate_t * pGate )
Ver_ParsePrintErrorMessage( pMan );
return 0;
}
Ver_ParseSkipComments( pMan );
// start the node
pNode = Abc_NtkCreateNode( pNtk );
......
src/misc/extra/extra.h
......@@ -530,6 +530,30 @@ static inline void Extra_TruthNand( unsigned * pOut, unsigned * pIn0, unsigned *
for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = ~(pIn0[w] & pIn1[w]);
}
static inline void Extra_TruthAndPhase( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars, int fCompl0, int fCompl1 )
{
int w;
if ( fCompl0 && fCompl1 )
{
for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = ~(pIn0[w] | pIn1[w]);
}
else if ( fCompl0 && !fCompl1 )
{
for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = ~pIn0[w] & pIn1[w];
}
else if ( !fCompl0 && fCompl1 )
{
for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = pIn0[w] & ~pIn1[w];
}
else // if ( !fCompl0 && !fCompl1 )
{
for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = pIn0[w] & pIn1[w];
}
}
extern unsigned ** Extra_TruthElementary( int nVars );
extern void Extra_TruthSwapAdjacentVars( unsigned * pOut, unsigned * pIn, int nVars, int Start );
......
src/opt/rwr/rwrEva.c
......@@ -129,7 +129,7 @@ clk2 = clock();
// label MFFC with current ID
Abc_NtkIncrementTravId( pNode->pNtk );
nNodesSaved = Abc_NodeMffcLabel( pNode );
nNodesSaved = Abc_NodeMffcLabelAig( pNode );
// unmark the fanin boundary
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
Abc_ObjRegular(pFanin)->vFanouts.nSize--;
......
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