Commit 0fddc352 by Thierry Moreau Committed by Tianqi Chen

timing closure fix for default VTA config (#1489)

parent a808a987
{ {
"TARGET" : "sim", "TARGET" : "sim",
"HW_FREQ" : 100, "HW_FREQ" : 100,
"HW_CLK_TARGET" : 8, "HW_CLK_TARGET" : 7,
"HW_VER" : "0.0.0", "HW_VER" : "0.0.0",
"LOG_INP_WIDTH" : 3, "LOG_INP_WIDTH" : 3,
"LOG_WGT_WIDTH" : 3, "LOG_WGT_WIDTH" : 3,
......
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