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yosys-tests
Commit ab409bd6 by Eddie Hung
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Deprecate use of shregmap's "-tech xilinx" option

parent 2cdd01ca
Showing with 1 additions and 1 deletions
simple/scripts/shregmap_match_enpol.ys
read_verilog ../top.v
synth_greenpak4 -run begin:map_luts
shregmap -tech xilinx -match -enpol any
shregmap -tech greenpak4 -match -enpol any
design -reset
read_verilog ../top.v
write_verilog synth.v
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