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lvzhengyang
yosys-tests
Commits
5bdf83fc
Commit
5bdf83fc
authored
Aug 30, 2019
by
Eddie Hung
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Add include dir for ecp5_abc9 too
parent
ab409bd6
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bigsim/run.sh
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5bdf83fc
...
@@ -46,7 +46,7 @@ case "$2" in
...
@@ -46,7 +46,7 @@ case "$2" in
;;
;;
ecp5_abc9
)
ecp5_abc9
)
yosys
-ql
synthlog.txt
-p
"
$PRESYN
; synth_ecp5 -abc9 -top
$TOP
; write_verilog synth.v"
$rtl_files
yosys
-ql
synthlog.txt
-p
"
$PRESYN
; synth_ecp5 -abc9 -top
$TOP
; write_verilog synth.v"
$rtl_files
iverilog_cmd
=
"
$iverilog_cmd
synth.v
$TECHLIBS_PREFIX
/ecp5/cells_sim.v"
iverilog_cmd
=
"
$iverilog_cmd
synth.v
$TECHLIBS_PREFIX
/ecp5/cells_sim.v
-I
$TECHLIBS_PREFIX
/ecp5
"
;;
;;
xilinx
)
xilinx
)
yosys
-ql
synthlog.txt
-p
"
$PRESYN
; synth_xilinx -top
$TOP
; write_verilog synth.v"
$rtl_files
yosys
-ql
synthlog.txt
-p
"
$PRESYN
; synth_xilinx -top
$TOP
; write_verilog synth.v"
$rtl_files
...
...
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