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lvzhengyang
yosys-tests
Commits
592495b7
Commit
592495b7
authored
Sep 19, 2019
by
Eddie Hung
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Add muladd tests
parent
5e97a7d8
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architecture/synth_xilinx_dsp/run-test.sh
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architecture/synth_xilinx_dsp/run-test.sh
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592495b7
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@@ -23,6 +23,8 @@ cp ~/yosys/yosys-bench/verilog/benchmarks_small/mul/common.py common_mul.py
PYTHONPATH
=
".:
$PYTHONPATH
"
python3 ../generate_mul.py
cp ~/yosys/yosys-bench/verilog/benchmarks_small/macc/common.py common_macc.py
PYTHONPATH
=
".:
$PYTHONPATH
"
python3 ../generate_macc.py
cp ~/yosys/yosys-bench/verilog/benchmarks_small/muladd/common.py common_muladd.py
PYTHONPATH
=
".:
$PYTHONPATH
"
python3 ../generate_muladd.py
python3 ../assert_area.py
cp ../
*
.v
.
${
MAKE
:-
make
}
-f
../../../../tools/autotest.mk
$seed
*
.v
EXTRA_FLAGS
=
"
\
...
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