Fix regressions (build #110): opt_lut removed.

architecture/Makefile

@@ -49,7 +49,7 @@ $(eval $(call template,synth_gowin_error,synth_gowin_fully_selected ))
 
 #ice40
 $(eval $(call template,synth_ice40,synth_ice40 synth_ice40_top synth_ice40_blif synth_ice40_edif synth_ice40_json synth_ice40_run synth_ice40_noflatten synth_ice40_flatten synth_ice40_retime synth_ice40_nocarry synth_ice40_nodffe synth_ice40_nobram synth_ice40_abc2 synth_ice40_vpr synth_ice40_relut synth_ice40_dsp synth_ice40_min_ce synth_ice40_noabc synth_ice40_device_u synth_ice40_device_lp synth_ice40_device_hx synth_ice40_opt))
-$(eval $(call template,synth_ice40_mem,synth_ice40 synth_ice40_top synth_ice40_blif synth_ice40_edif synth_ice40_json synth_ice40_run synth_ice40_noflatten synth_ice40_flatten synth_ice40_retime synth_ice40_nocarry synth_ice40_nodffe synth_ice40_nobram synth_ice40_abc2 synth_ice40_vpr synth_ice40_relut synth_ice40_dsp synth_ice40_min_ce synth_ice40_noabc synth_ice40_device_u synth_ice40_device_lp synth_ice40_device_hx synth_ice40_abc9 synth_ice40_unlut synth_ice40_opt))
+$(eval $(call template,synth_ice40_mem,synth_ice40 synth_ice40_top synth_ice40_blif synth_ice40_edif synth_ice40_json synth_ice40_run synth_ice40_noflatten synth_ice40_flatten synth_ice40_retime synth_ice40_nocarry synth_ice40_nodffe synth_ice40_nobram synth_ice40_abc2 synth_ice40_vpr synth_ice40_relut synth_ice40_dsp synth_ice40_min_ce synth_ice40_noabc synth_ice40_device_u synth_ice40_device_lp synth_ice40_device_hx synth_ice40_abc9  synth_ice40_opt))
 $(eval $(call template,synth_ice40_wide_ffs,synth_ice40 synth_ice40_top synth_ice40_blif synth_ice40_edif synth_ice40_json synth_ice40_run synth_ice40_noflatten synth_ice40_flatten synth_ice40_nocarry synth_ice40_nodffe synth_ice40_nobram synth_ice40_abc2 synth_ice40_vpr synth_ice40_relut synth_ice40_dsp synth_ice40_min_ce synth_ice40_noabc synth_ice40_device_u synth_ice40_device_lp synth_ice40_device_hx synth_ice40_opt))
 $(eval $(call template,synth_ice40_fulladder,synth_ice40 synth_ice40_top synth_ice40_blif synth_ice40_edif synth_ice40_json synth_ice40_run synth_ice40_noflatten synth_ice40_flatten synth_ice40_nocarry synth_ice40_nodffe synth_ice40_nobram synth_ice40_abc2 synth_ice40_vpr synth_ice40_relut synth_ice40_dsp synth_ice40_min_ce synth_ice40_noabc synth_ice40_device_u synth_ice40_device_lp synth_ice40_device_hx synth_ice40_opt))
 $(eval $(call template,synth_ice40_error,synth_ice40_fully_selected synth_ice40_abc9_retime synth_ice40_device_unknown))

architecture/scripts/synth_ice40_abc9.ys

 read_verilog ../top.v
 synth_ice40 -abc9
-ice40_unlut
 ice40_opt
 write_verilog synth.v

architecture/scripts/synth_ice40_unlut.ys

-read_verilog ../top.v
-synth_ice40
-ice40_unlut
-write_verilog synth.v

simple/scripts/opt_lut.ys

 read_verilog ../top.v
 synth_ice40
-ice40_unlut
 opt_lut
 design -reset
 read_verilog ../top.v

simple/scripts/opt_lut_dlogic.ys

 read_verilog ../top.v
 synth_ice40
-ice40_unlut
 opt_lut -dlogic $_ANDNOT_:A=I0
 design -reset
 read_verilog ../top.v

simple/scripts/opt_lut_limit.ys

 read_verilog ../top.v
 synth_ice40
-ice40_unlut
 opt_lut -limit 2
 design -reset
 read_verilog ../top.v

simple/scripts/opt_lut_limit_0.ys

 read_verilog ../top.v
 synth_ice40
-ice40_unlut
 opt_lut -limit 0
 design -reset
 read_verilog ../top.v