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lvzhengyang
sv2v
Commits
e69895af
Commit
e69895af
authored
Mar 29, 2019
by
Zachary Snow
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initial setup for combining pre-processor and lexer
parent
0d9ed3e1
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3 changed files
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8 deletions
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-8
src/Language/SystemVerilog/Parser/Lex.x
+0
-0
src/Language/SystemVerilog/Parser/Preprocess.hs
+0
-5
src/Language/SystemVerilog/Parser/Tokens.hs
+0
-3
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src/Language/SystemVerilog/Parser/Lex.x
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e69895af
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src/Language/SystemVerilog/Parser/Preprocess.hs
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e69895af
...
...
@@ -159,11 +159,6 @@ pp (Token Spe_Directive str pos : tokens) = do
return
$
replacement
++
tokens'
pp
(
Token
Spe_Newline
_
_
:
tokens
)
=
pp
tokens
pp
(
Token
Spe_Comment
_
_
:
tokens
)
=
pp
tokens
pp
(
Token
Spe_CommentBegin
_
_
:
tokens
)
=
pp
$
tail
$
dropWhile
(
not
.
isEnd
)
tokens
where
isEnd
(
Token
t
_
_
)
=
t
==
Spe_CommentEnd
pp
(
token
:
tokens
)
=
do
condStack
<-
gets
ppCondStack
...
...
src/Language/SystemVerilog/Parser/Tokens.hs
View file @
e69895af
...
...
@@ -334,9 +334,6 @@ data TokenName
|
Sym_amp_amp_amp
|
Sym_lt_lt_lt_eq
|
Sym_gt_gt_gt_eq
|
Spe_Comment
|
Spe_CommentBegin
|
Spe_CommentEnd
|
Spe_Directive
|
Spe_Newline
|
Unknown
...
...
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