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lvzhengyang
sv2v
Commits
dcca974f
Commit
dcca974f
authored
Sep 25, 2019
by
Zachary Snow
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Plain Diff
support size casts with complex size expressions
parent
1584f390
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Showing
4 changed files
with
33 additions
and
17 deletions
+33
-17
src/Convert/Simplify.hs
+3
-0
src/Convert/SizeCast.hs
+21
-17
test/basic/cast.sv
+5
-0
test/basic/cast.v
+4
-0
No files found.
src/Convert/Simplify.hs
View file @
dcca974f
...
...
@@ -49,9 +49,12 @@ traverseExprM = traverseNestedExprsM $ stately convertExpr
convertExpr
::
Info
->
Expr
->
Expr
convertExpr
info
(
Cast
(
Right
c
)
e
)
=
case
c'
of
Number
_
->
if
sized
==
e
then
Cast
(
Right
c'
)
e
else
sized
_
->
Cast
(
Right
c'
)
e
where
c'
=
simplify
$
traverseNestedExprs
(
substitute
info
)
(
simplify
c
)
sized
=
sizedExpr
""
c'
e
...
...
src/Convert/SizeCast.hs
View file @
dcca974f
...
...
@@ -15,7 +15,7 @@ import Convert.Traverse
import
Language.SystemVerilog.AST
type
TypeMap
=
Map
.
Map
Identifier
Type
type
CastSet
=
Set
.
Set
(
Int
,
Signing
)
type
CastSet
=
Set
.
Set
(
Expr
,
Signing
)
type
ST
=
StateT
TypeMap
(
Writer
CastSet
)
...
...
@@ -58,38 +58,42 @@ traverseExprM =
traverseNestedExprsM
convertExprM
where
convertExprM
::
Expr
->
ST
Expr
convertExprM
(
Cast
(
Right
(
Number
n
)
)
e
)
=
do
convertExprM
(
Cast
(
Right
s
)
e
)
=
do
typeMap
<-
get
case
(
readNumber
n
,
exprSigning
typeMap
e
)
of
(
Just
size
,
Just
sg
)
->
do
lift
$
tell
$
Set
.
singleton
(
s
ize
,
sg
)
let
f
=
castFnName
s
ize
sg
case
exprSigning
typeMap
e
of
Just
sg
->
do
lift
$
tell
$
Set
.
singleton
(
s
,
sg
)
let
f
=
castFnName
s
sg
let
args
=
Args
[
Just
e
]
[]
return
$
Call
Nothing
f
args
_
->
return
$
Cast
(
Right
$
Number
n
)
e
_
->
return
$
Cast
(
Right
s
)
e
convertExprM
other
=
return
other
castFn
::
Int
->
Signing
->
Description
castFn
n
sg
=
castFn
::
Expr
->
Signing
->
Description
castFn
e
sg
=
PackageItem
$
Function
(
Just
Automatic
)
t
fnName
[
decl
]
[
Return
$
Ident
inp
]
where
inp
=
"inp"
r
=
(
Number
$
show
(
n
-
1
),
Number
"0"
)
r
=
(
BinOp
Sub
e
(
Number
"1"
),
Number
"0"
)
t
=
IntegerVector
TLogic
sg
[
r
]
fnName
=
castFnName
n
sg
fnName
=
castFnName
e
sg
decl
=
Variable
Input
t
inp
[]
Nothing
castFnName
::
Int
->
Signing
->
String
castFnName
n
sg
=
if
n
<=
0
then
error
$
"cannot have non-positive size cast: "
++
show
n
else
castFnName
::
Expr
->
Signing
->
String
castFnName
e
sg
=
if
sg
==
Unspecified
then
init
name
else
name
where
name
=
"sv2v_cast_"
++
show
n
++
"_"
++
show
sg
where
sizeStr
=
case
e
of
Number
n
->
case
readNumber
n
of
Just
v
->
show
v
_
->
shortHash
e
_
->
shortHash
e
name
=
"sv2v_cast_"
++
sizeStr
++
"_"
++
show
sg
exprSigning
::
TypeMap
->
Expr
->
Maybe
Signing
exprSigning
typeMap
(
Ident
x
)
=
...
...
test/basic/cast.sv
View file @
dcca974f
module
top
;
parameter
WIDTH
=
32
;
initial
begin
logic
[
31
:
0
]
w
=
1234
;
int
x
=
-
235
;
...
...
@@ -16,6 +17,10 @@ module top;
$
display
(
"%b %b"
,
x
,
40
'
(
x
))
;
$
display
(
"%b %b"
,
y
,
40
'
(
y
))
;
$
display
(
"%b %b"
,
z
,
40
'
(
z
))
;
$
display
(
"%0d %0d"
,
w
,
($
clog2
(
WIDTH
))
'
(
w
))
;
$
display
(
"%0d %0d"
,
x
,
($
clog2
(
WIDTH
))
'
(
x
))
;
$
display
(
"%0d %0d"
,
y
,
($
clog2
(
WIDTH
))
'
(
y
))
;
$
display
(
"%0d %0d"
,
z
,
($
clog2
(
WIDTH
))
'
(
z
))
;
end
localparam
bit
foo
=
'0
;
localparam
logic
[
31
:
0
]
bar
=
32
'
(
foo
)
;
...
...
test/basic/cast.v
View file @
dcca974f
...
...
@@ -20,6 +20,10 @@ module top;
$
display
(
"%b %b"
,
x
,
{
8'hFF
,
x
}
)
;
$
display
(
"%b %b"
,
y
,
{
8'b0
,
y
}
)
;
$
display
(
"%b %b"
,
z
,
{
35'b0
,
z
}
)
;
$
display
(
"%0d %0d"
,
w
,
w
[
4
:
0
])
;
$
display
(
"%0d %0d"
,
x
,
$
signed
(
x
[
4
:
0
]))
;
$
display
(
"%0d %0d"
,
y
,
$
signed
(
y
[
4
:
0
]))
;
$
display
(
"%0d %0d"
,
z
,
z
[
4
:
0
])
;
end
localparam
[
0
:
0
]
foo
=
0
;
localparam
[
31
:
0
]
bar
=
32'b0
;
...
...
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