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lvzhengyang
sv2v
Commits
d84a4f7b
Commit
d84a4f7b
authored
Sep 17, 2019
by
Zachary Snow
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additional generate block simplification
parent
2d034dcb
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1 changed file
with
6 additions
and
2 deletions
+6
-2
src/Convert/Traverse.hs
+6
-2
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src/Convert/Traverse.hs
View file @
d84a4f7b
...
@@ -126,8 +126,9 @@ traverseModuleItemsM mapper (Part attrs extern kw lifetime name ports items) = d
...
@@ -126,8 +126,9 @@ traverseModuleItemsM mapper (Part attrs extern kw lifetime name ports items) = d
where
where
fullMapper
(
Generate
[
GenBlock
Nothing
genItems
])
=
fullMapper
(
Generate
[
GenBlock
Nothing
genItems
])
=
mapM
fullGenItemMapper
genItems
>>=
mapper
.
Generate
mapM
fullGenItemMapper
genItems
>>=
mapper
.
Generate
fullMapper
(
Generate
genItems
)
=
fullMapper
(
Generate
genItems
)
=
do
mapM
fullGenItemMapper
genItems
>>=
mapper
.
Generate
let
genItems'
=
filter
(
/=
GenNull
)
genItems
mapM
fullGenItemMapper
genItems'
>>=
mapper
.
Generate
fullMapper
(
MIAttr
attr
mi
)
=
fullMapper
(
MIAttr
attr
mi
)
=
fullMapper
mi
>>=
return
.
MIAttr
attr
fullMapper
mi
>>=
return
.
MIAttr
attr
fullMapper
other
=
mapper
other
fullMapper
other
=
mapper
other
...
@@ -137,6 +138,9 @@ traverseModuleItemsM mapper (Part attrs extern kw lifetime name ports items) = d
...
@@ -137,6 +138,9 @@ traverseModuleItemsM mapper (Part attrs extern kw lifetime name ports items) = d
return
$
case
moduleItem'
of
return
$
case
moduleItem'
of
Generate
subItems
->
GenBlock
Nothing
subItems
Generate
subItems
->
GenBlock
Nothing
subItems
_
->
GenModuleItem
moduleItem'
_
->
GenModuleItem
moduleItem'
genItemMapper
(
GenIf
(
Number
"1"
)
s
_
)
=
return
s
genItemMapper
(
GenIf
(
Number
"0"
)
_
s
)
=
return
s
genItemMapper
(
GenBlock
_
[]
)
=
return
GenNull
genItemMapper
other
=
return
other
genItemMapper
other
=
return
other
breakGenerate
::
ModuleItem
->
[
ModuleItem
]
breakGenerate
::
ModuleItem
->
[
ModuleItem
]
breakGenerate
(
Generate
genItems
)
=
breakGenerate
(
Generate
genItems
)
=
...
...
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