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lvzhengyang
sv2v
Commits
d57c9670
Commit
d57c9670
authored
Sep 28, 2019
by
Zachary Snow
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added partial support for implicitly sized arrays
parent
454afa97
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3 changed files
with
15 additions
and
2 deletions
+15
-2
src/Language/SystemVerilog/Parser/Parse.y
+1
-0
src/Language/SystemVerilog/Parser/ParseDecl.hs
+13
-0
test/basic/stream.sv
+1
-2
No files found.
src/Language/SystemVerilog/Parser/Parse.y
View file @
d57c9670
...
@@ -592,6 +592,7 @@ DeclOrStmtTokens(delim) :: { [DeclToken] }
...
@@ -592,6 +592,7 @@ DeclOrStmtTokens(delim) :: { [DeclToken] }
| "<=" opt(DelayOrEventControl) Expr delim { [DTAsgnNBlk $2 $3] }
| "<=" opt(DelayOrEventControl) Expr delim { [DTAsgnNBlk $2 $3] }
DeclOrStmtToken :: { DeclToken }
DeclOrStmtToken :: { DeclToken }
: "," { DTComma }
: "," { DTComma }
| "[" "]" { DTAutoDim }
| PartSelect { DTRange $1 }
| PartSelect { DTRange $1 }
| Identifier { DTIdent $1 }
| Identifier { DTIdent $1 }
| Direction { DTDir $1 }
| Direction { DTDir $1 }
...
...
src/Language/SystemVerilog/Parser/ParseDecl.hs
View file @
d57c9670
...
@@ -46,6 +46,7 @@ import Language.SystemVerilog.AST
...
@@ -46,6 +46,7 @@ import Language.SystemVerilog.AST
-- [PUBLIC]: combined (irregular) tokens for declarations
-- [PUBLIC]: combined (irregular) tokens for declarations
data
DeclToken
data
DeclToken
=
DTComma
=
DTComma
|
DTAutoDim
|
DTAsgn
AsgnOp
Expr
|
DTAsgn
AsgnOp
Expr
|
DTAsgnNBlk
(
Maybe
Timing
)
Expr
|
DTAsgnNBlk
(
Maybe
Timing
)
Expr
|
DTRange
(
PartSelectMode
,
Range
)
|
DTRange
(
PartSelectMode
,
Range
)
...
@@ -384,10 +385,22 @@ takeRanges (token : tokens) =
...
@@ -384,10 +385,22 @@ takeRanges (token : tokens) =
case
token
of
case
token
of
DTRange
(
NonIndexed
,
r
)
->
(
r
:
rs
,
rest
)
DTRange
(
NonIndexed
,
r
)
->
(
r
:
rs
,
rest
)
DTBit
s
->
(
asRange
s
:
rs
,
rest
)
DTBit
s
->
(
asRange
s
:
rs
,
rest
)
DTAutoDim
->
case
rest
of
(
DTAsgn
AsgnOpEq
(
Pattern
l
)
:
_
)
->
autoDim
l
(
DTAsgn
AsgnOpEq
(
Concat
l
)
:
_
)
->
autoDim
l
_
->
(
[]
,
token
:
tokens
)
_
->
(
[]
,
token
:
tokens
)
_
->
(
[]
,
token
:
tokens
)
where
where
(
rs
,
rest
)
=
takeRanges
tokens
(
rs
,
rest
)
=
takeRanges
tokens
asRange
s
=
(
Number
"0"
,
BinOp
Sub
s
(
Number
"1"
))
asRange
s
=
(
Number
"0"
,
BinOp
Sub
s
(
Number
"1"
))
autoDim
::
[
a
]
->
([
Range
],
[
DeclToken
])
autoDim
l
=
((
lo
,
hi
)
:
rs
,
rest
)
where
n
=
length
l
lo
=
Number
"0"
hi
=
Number
$
show
(
n
-
1
)
-- Matching DTAsgnNBlk here allows tripLookahead to work both for standard
-- Matching DTAsgnNBlk here allows tripLookahead to work both for standard
-- declarations and in `parseDTsAsDeclOrAsgn`, where we're checking for an
-- declarations and in `parseDTsAsDeclOrAsgn`, where we're checking for an
...
...
test/basic/stream.sv
View file @
d57c9670
...
@@ -6,8 +6,7 @@ module top;
...
@@ -6,8 +6,7 @@ module top;
logic
[
3
:
0
]
data
;
logic
[
3
:
0
]
data
;
}
packet_t
;
}
packet_t
;
initial
begin
initial
begin
// TODO: Add support for implicitly sized arrays.
logic
[
1
:
0
]
array
[]
=
'
{
2'b10
,
2'b01
,
2'b11
,
2'b00
};
logic
[
1
:
0
]
array
[
4
]
=
'
{
2'b10
,
2'b01
,
2'b11
,
2'b00
};
packet_t
packet
=
{<<
4
{
{<<
2
{
array
}}
}};
packet_t
packet
=
{<<
4
{
{<<
2
{
array
}}
}};
$
display
(
"packet addr = %b"
,
packet
.
addr
)
;
$
display
(
"packet addr = %b"
,
packet
.
addr
)
;
$
display
(
"packet data = %b"
,
packet
.
data
)
;
$
display
(
"packet data = %b"
,
packet
.
data
)
;
...
...
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