Commit 814f9659 by Zachary Snow

fix assertion removal in verbose mode causing orphaned statements

parent 540a0c8e
...@@ -44,6 +44,7 @@ ...@@ -44,6 +44,7 @@
unpacked arrays, or in designs with multi-dimensional instances unpacked arrays, or in designs with multi-dimensional instances
* Fixed conversion of module-scoped references to modports * Fixed conversion of module-scoped references to modports
* Fixed conversion of references to modports nested within types in expressions * Fixed conversion of references to modports nested within types in expressions
* Fixed assertion removal in verbose mode causing orphaned statements
## v0.0.8 ## v0.0.8
......
...@@ -217,7 +217,9 @@ traverseSinglyNestedStmtsM fullMapper = cs ...@@ -217,7 +217,9 @@ traverseSinglyNestedStmtsM fullMapper = cs
where where
cs (StmtAttr a stmt) = fullMapper stmt >>= return . StmtAttr a cs (StmtAttr a stmt) = fullMapper stmt >>= return . StmtAttr a
cs (Block _ "" [] []) = return Null cs (Block _ "" [] []) = return Null
cs (Block _ "" [] [CommentStmt{}]) = return Null
cs (Block _ "" [] [stmt]) = fullMapper stmt cs (Block _ "" [] [stmt]) = fullMapper stmt
cs (Block _ "" [CommentDecl{}] []) = return Null
cs (Block Seq name decls stmts) = do cs (Block Seq name decls stmts) = do
stmts' <- mapM fullMapper stmts stmts' <- mapM fullMapper stmts
return $ Block Seq name decls $ concatMap explode stmts' return $ Block Seq name decls $ concatMap explode stmts'
......
...@@ -15,4 +15,18 @@ module Module(input clock, input clear, input data); ...@@ -15,4 +15,18 @@ module Module(input clock, input clear, input data);
assert property (x == y); assert property (x == y);
named_stmt: assert property (x == y); named_stmt: assert property (x == y);
end end
always @(posedge x) begin
assert (1);
end
always @(posedge x)
case (x)
0: begin
assert (1);
end
1:
assert (1);
default: begin
assert (1);
end
endcase
endmodule endmodule
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