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lvzhengyang
sv2v
Commits
5c8d838e
Commit
5c8d838e
authored
Feb 01, 2021
by
Zachary Snow
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fix overzealous task/function decl hoisting
parent
b8759776
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3 changed files
with
56 additions
and
3 deletions
+56
-3
src/Convert/TFBlock.hs
+23
-3
test/basic/unnamed_block_shadow.sv
+22
-0
test/basic/unnamed_block_shadow.v
+11
-0
No files found.
src/Convert/TFBlock.hs
View file @
5c8d838e
...
...
@@ -8,7 +8,7 @@
module
Convert.TFBlock
(
convert
)
where
import
Data.List
(
isPrefixOf
)
import
Data.List
(
i
ntersect
,
i
sPrefixOf
)
import
Convert.Traverse
import
Language.SystemVerilog.AST
...
...
@@ -41,15 +41,35 @@ stmtsToStmt stmts = Block Seq "" [] stmts
flattenOuterBlocks
::
Stmt
->
([
Decl
],
[
Stmt
])
flattenOuterBlocks
(
Block
Seq
""
declsA
[
stmt
])
=
(
declsA
++
declsB
,
stmtsB
)
if
canCombine
declsA
declsB
then
(
declsA
++
declsB
,
stmtsB
)
else
(
declsA
,
[
stmt
])
where
(
declsB
,
stmtsB
)
=
flattenOuterBlocks
stmt
flattenOuterBlocks
(
Block
Seq
""
declsA
(
Block
Seq
name
declsB
stmtsA
:
stmtsB
))
=
flattenOuterBlocks
$
Block
Seq
name
(
declsA
++
declsB
)
(
stmtsA
++
stmtsB
)
if
canCombine
declsA
declsB
then
flattenOuterBlocks
$
Block
Seq
name
(
declsA
++
declsB
)
(
stmtsA
++
stmtsB
)
else
(
declsA
,
Block
Seq
name
declsB
stmtsA
:
stmtsB
)
flattenOuterBlocks
(
Block
Seq
name
decls
stmts
)
|
notscope
name
=
(
decls
,
stmts
)
|
otherwise
=
(
[]
,
[
Block
Seq
name
decls
stmts
])
flattenOuterBlocks
stmt
=
(
[]
,
[
stmt
])
canCombine
::
[
Decl
]
->
[
Decl
]
->
Bool
canCombine
[]
_
=
True
canCombine
_
[]
=
True
canCombine
declsA
declsB
=
null
$
intersect
(
declNames
declsA
)
(
declNames
declsB
)
declNames
::
[
Decl
]
->
[
Identifier
]
declNames
=
filter
(
not
.
null
)
.
map
declName
declName
::
Decl
->
Identifier
declName
(
Variable
_
_
x
_
_
)
=
x
declName
(
Param
_
_
x
_
)
=
x
declName
(
ParamType
_
x
_
)
=
x
declName
CommentDecl
{}
=
""
notscope
::
Identifier
->
Bool
notscope
""
=
True
notscope
name
=
"sv2v_autoblock_"
`
isPrefixOf
`
name
test/basic/unnamed_block_shadow.sv
0 → 100644
View file @
5c8d838e
`define
TEST
\
reg
x
;
\
begin
\
reg
[
1
:
0
]
x
;
\
$
display
(
"%0d %b"
,
$
bits
(
x
)
,
x
)
;
\
end
\
$
display
(
"%0d %b"
,
$
bits
(
x
)
,
x
)
;
module
top
;
task
t
;
input
integer
unused
;
`TEST
endtask
function
f
;
input
integer
unused
;
`TEST
endfunction
initial
t
(
f
(
0
))
;
initial
begin
`TEST
end
endmodule
test/basic/unnamed_block_shadow.v
0 → 100644
View file @
5c8d838e
module
top
;
initial
begin
:
blk
integer
i
;
reg
[
1
:
0
]
y
;
reg
x
;
for
(
i
=
0
;
i
<
3
;
i
=
i
+
1
)
begin
$
display
(
"%0d %b"
,
2
,
y
)
;
$
display
(
"%0d %b"
,
1
,
x
)
;
end
end
endmodule
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