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lvzhengyang
sv2v
Commits
4dc672bb
Commit
4dc672bb
authored
May 05, 2024
by
Zachary Snow
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bump license year
parent
a4928a87
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LICENSE
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src/Job.hs
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LICENSE
View file @
4dc672bb
BSD 3-Clause License
BSD 3-Clause License
Copyright 2019-202
3
Zachary Snow
Copyright 2019-202
4
Zachary Snow
Copyright 2011-2015 Tom Hawkins
Copyright 2011-2015 Tom Hawkins
All rights reserved.
All rights reserved.
...
...
src/Job.hs
View file @
4dc672bb
...
@@ -106,7 +106,7 @@ defaultJob = Job
...
@@ -106,7 +106,7 @@ defaultJob = Job
&=
summary
(
"sv2v "
++
version
)
&=
summary
(
"sv2v "
++
version
)
&=
details
[
"sv2v converts SystemVerilog to Verilog."
&=
details
[
"sv2v converts SystemVerilog to Verilog."
,
"More info: https://github.com/zachjs/sv2v"
,
"More info: https://github.com/zachjs/sv2v"
,
"(C) 2019-202
3
Zachary Snow, 2011-2015 Tom Hawkins"
]
,
"(C) 2019-202
4
Zachary Snow, 2011-2015 Tom Hawkins"
]
&=
helpArg
[
explicit
,
name
"help"
,
help
"Display this help message"
]
&=
helpArg
[
explicit
,
name
"help"
,
help
"Display this help message"
]
&=
versionArg
[
explicit
,
name
"version"
]
&=
versionArg
[
explicit
,
name
"version"
]
&=
verbosityArgs
[
ignore
]
[
ignore
]
&=
verbosityArgs
[
ignore
]
[
ignore
]
...
...
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