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lvzhengyang
sv2v
Commits
490d96ba
Commit
490d96ba
authored
Feb 05, 2021
by
Zachary Snow
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generate consistent hashes within interface conversion
parent
dd1a9efb
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3 changed files
with
54 additions
and
9 deletions
+54
-9
src/Convert/Interface.hs
+11
-9
test/basic/interface_nested_array.sv
+23
-0
test/basic/interface_nested_array.v
+20
-0
No files found.
src/Convert/Interface.hs
View file @
490d96ba
...
...
@@ -79,7 +79,7 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) =
-- inline instantiation of an interface
convertNested
$
Generate
$
map
GenModuleItem
$
inlineInstance
rs
[]
partItems
instanceName
paramBindings
portBindings
partItems
part
instanceName
paramBindings
portBindings
else
if
null
modportInstances
then
return
instanceItem
else
do
...
...
@@ -94,7 +94,7 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) =
++
showKeys
modportBindings
++
" are connected"
else
convertNested
$
Generate
$
map
GenModuleItem
$
inlineInstance
rs
modportBindings
partItems
instanceName
paramBindings
portBindings
part
instanceName
paramBindings
portBindings
where
Instance
part
rawParamBindings
instanceName
rs
rawPortBindings
=
instanceItem
...
...
@@ -242,7 +242,7 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) =
case
Map
.
lookup
x
replacements
of
Just
replacement
->
replacement
Nothing
->
if
"_
tmp
_"
`
isPrefixOf
`
x
if
"_
param
_"
`
isPrefixOf
`
x
then
Ident
x
else
Dot
instanceE
x
prefixExpr
other
=
traverseSinglyNestedExprs
prefixExpr
other
...
...
@@ -298,9 +298,9 @@ impliedModport =
-- convert an interface-bound module instantiation or an interface instantiation
-- into a series of equivalent inlined module items
inlineInstance
::
[
Range
]
->
[
ModportBinding
]
->
[
ModuleItem
]
inlineInstance
::
[
Range
]
->
[
ModportBinding
]
->
[
ModuleItem
]
->
Identifier
->
Identifier
->
[
ParamBinding
]
->
[
PortBinding
]
->
[
ModuleItem
]
inlineInstance
ranges
modportBindings
items
inlineInstance
ranges
modportBindings
items
partName
instanceName
instanceParams
instancePorts
=
comment
:
map
(
MIPackageItem
.
Decl
)
bindingBaseParams
++
...
...
@@ -315,6 +315,8 @@ inlineInstance ranges modportBindings items
then
dimensionModport
:
bundleModport
:
items
else
items
key
=
shortHash
(
partName
,
instanceName
)
-- synthetic modports to be collected and removed after inlining
bundleModport
=
Modport
""
(
impliedModport
items
)
dimensionModport
=
if
not
isArray
...
...
@@ -472,7 +474,7 @@ inlineInstance ranges modportBindings items
case
makeBindingBaseExpr
modportE
of
Just
expr
->
localparam
(
bindingBaseName
++
portName
)
expr
Nothing
->
CommentDecl
"no-op"
bindingBaseName
=
"_
sv2v_bind_base_"
++
shortHash
instanceName
++
"_"
bindingBaseName
=
"_
bbase_"
++
key
++
"_"
makeBindingBaseExpr
::
Expr
->
Maybe
Expr
makeBindingBaseExpr
modportE
=
case
modportE
of
...
...
@@ -485,7 +487,7 @@ inlineInstance ranges modportBindings items
localparam
::
Identifier
->
Expr
->
Decl
localparam
=
Param
Localparam
(
Implicit
Unspecified
[]
)
paramTmp
=
"_
tmp_"
++
(
shortHash
(
items
,
instanceName
))
++
"_"
paramTmp
=
"_
param_"
++
key
++
"_"
parameterBinds
=
map
makeParameterBind
instanceParams
makeParameterBind
::
ParamBinding
->
Decl
...
...
@@ -545,7 +547,7 @@ inlineInstance ranges modportBindings items
++
" output to "
++
show
expr
++
" but that can't be an LHS"
-- for instance arrays, a unique identifier to be used as a genvar
loopVar
=
"_
sv2v_arr_"
++
shortHash
(
instanceName
,
ranges
)
loopVar
=
"_
arr_"
++
key
isArray
=
not
$
null
ranges
[
arrayRange
@
(
arrayLeft
,
arrayRight
)]
=
ranges
...
...
@@ -574,7 +576,7 @@ pattern Tag :: Expr
pattern
Tag
=
Ident
"%"
modportBaseName
::
Identifier
->
Identifier
modportBaseName
=
(
++
)
"_
sv2v_
base_"
modportBaseName
=
(
++
)
"_
m
base_"
-- the dimensions of interface instance arrays are encoded as synthetic modports
-- during inlining, enabling subsequent modport bindings to implicitly use the
...
...
test/basic/interface_nested_array.sv
0 → 100644
View file @
490d96ba
interface
Interface
;
logic
x
;
endinterface
module
ModuleC
(
Interface
intf
,
input
y
)
;
initial
$
display
(
"ModuleC %b %b"
,
intf
.
x
,
y
)
;
endmodule
module
ModuleB
(
Interface
intf
,
input
y
)
;
initial
$
display
(
"ModuleB %b %b"
,
intf
.
x
,
y
)
;
ModuleC
m
[
2
:
0
]
(
intf
,
y
)
;
endmodule
module
ModuleA
(
Interface
intf
,
input
y
)
;
initial
$
display
(
"ModuleA %b %b"
,
intf
.
x
,
y
)
;
ModuleB
m
[
2
:
0
]
(
intf
,
y
)
;
endmodule
module
top
;
logic
y
;
Interface
intf
()
;
ModuleA
m
[
2
:
0
]
(
intf
,
y
)
;
endmodule
test/basic/interface_nested_array.v
0 → 100644
View file @
490d96ba
module
top
;
generate
if
(
1
)
begin
:
intf
wire
x
;
end
endgenerate
wire
y
;
genvar
i
,
j
,
k
;
generate
for
(
i
=
2
;
i
>=
0
;
i
=
i
-
1
)
begin
initial
$
display
(
"ModuleA %b %b"
,
intf
.
x
,
y
)
;
for
(
j
=
2
;
j
>=
0
;
j
=
j
-
1
)
begin
initial
$
display
(
"ModuleB %b %b"
,
intf
.
x
,
y
)
;
for
(
k
=
2
;
k
>=
0
;
k
=
k
-
1
)
begin
initial
$
display
(
"ModuleC %b %b"
,
intf
.
x
,
y
)
;
end
end
end
endgenerate
endmodule
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