Commit 24a79ffe by Zachary Snow

support multi-dimensional modports

parent e0e29634
...@@ -302,12 +302,12 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) = ...@@ -302,12 +302,12 @@ convertDescription parts (Part attrs extern Module lifetime name ports items) =
collectDecl _ = return () collectDecl _ = return ()
extractModportInfo :: Type -> Maybe (Identifier, Identifier) extractModportInfo :: Type -> Maybe (Identifier, Identifier)
extractModportInfo (InterfaceT "" "" []) = Just ("", "") extractModportInfo (InterfaceT "" "" _) = Just ("", "")
extractModportInfo (InterfaceT interfaceName modportName []) = extractModportInfo (InterfaceT interfaceName modportName _) =
if isInterface interfaceName if isInterface interfaceName
then Just (interfaceName, modportName) then Just (interfaceName, modportName)
else Nothing else Nothing
extractModportInfo (Alias interfaceName []) = extractModportInfo (Alias interfaceName _) =
if isInterface interfaceName if isInterface interfaceName
then Just (interfaceName, "") then Just (interfaceName, "")
else Nothing else Nothing
...@@ -496,15 +496,17 @@ inlineInstance global ranges modportBindings items partName ...@@ -496,15 +496,17 @@ inlineInstance global ranges modportBindings items partName
Variable d t x a e Variable d t x a e
else if makeBindingBaseExpr modportE == Nothing then else if makeBindingBaseExpr modportE == Nothing then
CommentDecl $ "removed modport instance " ++ x CommentDecl $ "removed modport instance " ++ x
else if null a then else if null modportDims then
localparam (modportBaseName x) bindingBaseExpr localparam (modportBaseName x) bindingBaseExpr
else else
localparam (modportBaseName x) $ localparam (modportBaseName x) $
BinOp Sub bindingBaseExpr (sliceLo NonIndexed $ head a) BinOp Sub bindingBaseExpr (sliceLo NonIndexed modportDim)
where where
maybeModportBinding = lookup x modportBindings maybeModportBinding = lookup x modportBindings
Just (_, modportE) = maybeModportBinding Just (_, modportE) = maybeModportBinding
bindingBaseExpr = Ident $ bindingBaseName ++ x bindingBaseExpr = Ident $ bindingBaseName ++ x
modportDims = a ++ snd (typeRanges t)
[modportDim] = modportDims
removeModportInstance other = other removeModportInstance other = other
......
...@@ -29,25 +29,25 @@ convert :: [AST] -> [AST] ...@@ -29,25 +29,25 @@ convert :: [AST] -> [AST]
convert = map $ traverseDescriptions convertDescription convert = map $ traverseDescriptions convertDescription
convertDescription :: Description -> Description convertDescription :: Description -> Description
convertDescription (description @ (Part _ _ Module _ _ _ _)) = convertDescription (description @ (Part _ _ Module _ _ ports _)) =
evalState (operation description) Set.empty evalState (operation description) Set.empty
where where
operation = operation = partScoperT
partScoperT traverseDeclM traverseModuleItemM noop traverseStmtM >=> (traverseDeclM ports) traverseModuleItemM noop traverseStmtM >=>
partScoperT rewriteDeclM noop noop noop partScoperT rewriteDeclM noop noop noop
noop = return noop = return
convertDescription other = other convertDescription other = other
-- tracks multi-dimensional unpacked array declarations -- tracks multi-dimensional unpacked array declarations
traverseDeclM :: Decl -> ST Decl traverseDeclM :: [Identifier] -> Decl -> ST Decl
traverseDeclM (decl @ (Variable _ _ _ [] _)) = return decl traverseDeclM _ (decl @ (Variable _ _ _ [] _)) = return decl
traverseDeclM (decl @ (Variable dir _ x _ e)) = do traverseDeclM ports (decl @ (Variable _ _ x _ e)) = do
insertElem x decl insertElem x decl
if dir /= Local || e /= Nil if elem x ports || e /= Nil
then flatUsageM x then flatUsageM x
else return () else return ()
return decl return decl
traverseDeclM other = return other traverseDeclM _ other = return other
-- pack decls marked for packing -- pack decls marked for packing
rewriteDeclM :: Decl -> ST Decl rewriteDeclM :: Decl -> ST Decl
......
interface Interface;
logic [0:1][0:2] arr;
endinterface
module Module(intf);
Interface intf [3:3][1:2];
assign intf[3][2].arr[1] = 1;
assign intf[3][2].arr[0][0] = 0;
initial $display("2: %b", intf[3][2].arr);
endmodule
module top;
Interface intf [1:1][1:2] ();
Module mod (intf);
assign intf[1][1].arr[1] = 6;
assign intf[1][1].arr[0][0] = 1;
initial $display("1: %b", intf[1][1].arr);
endmodule
module top;
if (1) begin : intf1
wire [0:1][0:2] arr;
end
if (1) begin : intf2
wire [0:1][0:2] arr;
end
assign intf2.arr[1] = 1;
assign intf2.arr[0][0] = 0;
initial $display("2: %b", intf2.arr);
assign intf1.arr[1] = 6;
assign intf1.arr[0][0] = 1;
initial $display("1: %b", intf1.arr);
endmodule
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