gcc/config/riscv · e817c23f6806a6b9201a0a1f77b51cb863af51e9 · lvzhengyang / riscv-gcc-1

RISC-V: Using fmv.x.w/fmv.w.x rather than fmv.x.s/fmv.s.x · bfe78b08

 - fmv.x.s/fmv.s.x renamed to fmv.x.w/fmv.w.x in the latest RISC-V ISA
   manual.

 - Tested rv32gc/rv64gc on bare-metal with qemu.

ChangeLog

gcc/

Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
	rather than fmv.x.s/fmv.s.x.

committed Feb 19, 2020

bfe78b08

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