Skip to content

R
riscv-gcc-1
Commit ff2a9d88 by Richard Henderson Committed by Richard Henderson
Options

alpha: widening multiply pattern 

        * config/alpha/alpha.md (umulditi3): New.

From-SVN: r195668
parent 749af8ee
Showing with 17 additions and 0 deletions
gcc/ChangeLog
......@@ -3,6 +3,8 @@
* config/rs6000/rs6000.md (smulditi3): New.
(umulditi3): New.
* config/alpha/alpha.md (umulditi3): New.
2013-02-01 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2.
......
gcc/config/alpha/alpha.md
......@@ -720,6 +720,21 @@
[(set_attr "type" "imul")
(set_attr "opsize" "udi")])
(define_expand "umulditi3"
[(set (match_operand:TI 0 "register_operand")
(mult:TI
(zero_extend:TI (match_operand:DI 1 "reg_no_subreg_operand"))
(zero_extend:TI (match_operand:DI 2 "reg_no_subreg_operand"))))]
""
{
rtx l = gen_reg_rtx (DImode), h = gen_reg_rtx (DImode);
emit_insn (gen_muldi3 (l, operands[1], operands[2]));
emit_insn (gen_umuldi3_highpart (h, operands[1], operands[2]));
emit_move_insn (gen_lowpart (DImode, operands[0]), l);
emit_move_insn (gen_highpart (DImode, operands[0]), h);
DONE;
})
;; The divide and remainder operations take their inputs from r24 and
;; r25, put their output in r27, and clobber r23 and r28 on all systems.
;;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment