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riscv-gcc-1
Commit f8eb41cc by Jeffrey A Law Committed by Jeff Law
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pa.c (move_operand): Accept code to load the address of a symbol out of the DLT… 

pa.c (move_operand): Accept code to load the address of a symbol out of the DLT as a valid move operand.

        * pa.c (move_operand): Accept code to load the address of a
        symbol out of the DLT as a valid move operand.
        (print_operand, case 'A'): New to handle generating a DLT
        reference for a LO_SUM expression.
        * pa.h (EXTRA_CONSTRAINT): Handle 'A' for DLT LO_SUM references.
        * pa.md (movsi, movdi patterns): Allow DLT LO_SUM references.

From-SVN: r39914
parent 4d88a68a
Showing with 48 additions and 52 deletions
gcc/ChangeLog
Mon Feb 19 20:30:16 2001 Jeffrey A Law (law@cygnus.com)
* pa.c (move_operand): Accept code to load the address of a
symbol out of the DLT as a valid move operand.
(print_operand, case 'A'): New to handle generating a DLT
reference for a LO_SUM expression.
* pa.h (EXTRA_CONSTRAINT): Handle 'A' for DLT LO_SUM references.
* pa.md (movsi, movdi patterns): Allow DLT LO_SUM references.
2001-02-19 Joseph S. Myers <jsm28@cam.ac.uk> 2001-02-19 Joseph S. Myers <jsm28@cam.ac.uk>
* README, cpp.texi, gcc.texi, version.c: Update version number to * README, cpp.texi, gcc.texi, version.c: Update version number to
......
gcc/config/pa/pa.c
...@@ -377,13 +377,14 @@ move_operand (op, mode) ...@@ -377,13 +377,14 @@ move_operand (op, mode)
op = XEXP (op, 0); op = XEXP (op, 0);
/* The LO_SUM part of a DLT reference is not considered a move_operand; /* We consider a LO_SUM DLT reference a move_operand now since it has
we must reject it here since it must be accepted by memory_address_p. */ been merged into the normal movsi/movdi patterns. */
if (GET_CODE (op) == LO_SUM if (GET_CODE (op) == LO_SUM
&& GET_CODE (XEXP (op, 0)) == REG && GET_CODE (XEXP (op, 0)) == REG
&& REG_OK_FOR_BASE_P (XEXP (op, 0)) && REG_OK_FOR_BASE_P (XEXP (op, 0))
&& GET_CODE (XEXP (op, 1)) == UNSPEC) && GET_CODE (XEXP (op, 1)) == UNSPEC
return 0; && GET_MODE (op) == Pmode)
return 1;
/* Since move_operand is only used for source operands, we can always /* Since move_operand is only used for source operands, we can always
allow scaled indexing! */ allow scaled indexing! */
...@@ -3883,6 +3884,17 @@ print_operand (file, x, code) ...@@ -3883,6 +3884,17 @@ print_operand (file, x, code)
} }
else else
break; break;
case 'A':
{
rtx xoperands[2];
xoperands[0] = XEXP (XEXP (x, 0), 0);
xoperands[1] = XVECEXP (XEXP (XEXP (x, 0), 1), 0, 0);
output_global_address (file, xoperands[1], 0);
fprintf (file, "(%s)", reg_names [REGNO (xoperands[0])]);
return;
}
case 'C': /* Plain (C)ondition */ case 'C': /* Plain (C)ondition */
case 'X': case 'X':
switch (GET_CODE (x)) switch (GET_CODE (x))
......
gcc/config/pa/pa.h
...@@ -1187,8 +1187,15 @@ extern int may_call_alloca; ...@@ -1187,8 +1187,15 @@ extern int may_call_alloca;
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\ || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
: ((C) == 'U' ? \ : ((C) == 'U' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \ (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
: ((C) == 'A' ? \
(GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == LO_SUM \
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
&& GET_MODE (XEXP (OP, 0)) == Pmode) \
: ((C) == 'S' ? \ : ((C) == 'S' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))) (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
......
gcc/config/pa/pa.md
...@@ -2098,13 +2098,14 @@ ...@@ -2098,13 +2098,14 @@
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand" [(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
"=r,r,r,r,r,Q,*q,!f,f,*TR") "=r,r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:SI 1 "move_operand" (match_operand:SI 1 "move_operand"
"r,J,N,K,RQ,rM,rM,!fM,*RT,f"))] "A,r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], SImode) "(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode)) || reg_or_0_operand (operands[1], SImode))
&& ! TARGET_SOFT_FLOAT" && ! TARGET_SOFT_FLOAT"
"@ "@
ldw RT'%A1,%0
copy %1,%0 copy %1,%0
ldi %1,%0 ldi %1,%0
ldil L'%1,%0 ldil L'%1,%0
...@@ -2115,19 +2116,20 @@ ...@@ -2115,19 +2116,20 @@
fcpy,sgl %f1,%0 fcpy,sgl %f1,%0
fldw%F1 %1,%0 fldw%F1 %1,%0
fstw%F0 %1,%0" fstw%F0 %1,%0"
[(set_attr "type" "move,move,move,shift,load,store,move,fpalu,fpload,fpstore") [(set_attr "type" "load,move,move,move,shift,load,store,move,fpalu,fpload,fpstore")
(set_attr "pa_combine_type" "addmove") (set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4,4,4,4")]) (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4")])
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand" [(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand"
"=r,r,r,r,r,Q,*q") "=r,r,r,r,r,r,Q,*q")
(match_operand:SI 1 "move_operand" (match_operand:SI 1 "move_operand"
"r,J,N,K,RQ,rM,rM"))] "A,r,J,N,K,RQ,rM,rM"))]
"(register_operand (operands[0], SImode) "(register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode)) || reg_or_0_operand (operands[1], SImode))
&& TARGET_SOFT_FLOAT" && TARGET_SOFT_FLOAT"
"@ "@
ldw RT'%A1,%0
copy %1,%0 copy %1,%0
ldi %1,%0 ldi %1,%0
ldil L'%1,%0 ldil L'%1,%0
...@@ -2135,9 +2137,9 @@ ...@@ -2135,9 +2137,9 @@
ldw%M1 %1,%0 ldw%M1 %1,%0
stw%M0 %r1,%0 stw%M0 %r1,%0
mtsar %r1" mtsar %r1"
[(set_attr "type" "move,move,move,move,load,store,move") [(set_attr "type" "load,move,move,move,move,load,store,move")
(set_attr "pa_combine_type" "addmove") (set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4")]) (set_attr "length" "4,4,4,4,4,4,4,4")])
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
...@@ -2346,41 +2348,6 @@ ...@@ -2346,41 +2348,6 @@
[(set_attr "type" "binary") [(set_attr "type" "binary")
(set_attr "length" "4")]) (set_attr "length" "4")])
; We need this to make sure CSE doesn't simplify a memory load with a
; symbolic address, whose content it think it knows. For PIC, what CSE
; think is the real value will be the address of that value.
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(mem:SI
(lo_sum:SI (match_operand:SI 1 "register_operand" "r")
(unspec:SI
[(match_operand:SI 2 "symbolic_operand" "")] 0))))]
""
"*
{
if (flag_pic != 2)
abort ();
return \"ldw RT'%G2(%1),%0\";
}"
[(set_attr "type" "load")
(set_attr "length" "4")])
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(mem:DI
(lo_sum:DI (match_operand:DI 1 "register_operand" "r")
(unspec:DI
[(match_operand:DI 2 "symbolic_operand" "")] 0))))]
"TARGET_64BIT"
"*
{
if (flag_pic != 2)
abort ();
return \"ldd RT'%G2(%1),%0\";
}"
[(set_attr "type" "load")
(set_attr "length" "4")])
;; Always use addil rather than ldil;add sequences. This allows the ;; Always use addil rather than ldil;add sequences. This allows the
;; HP linker to eliminate the dp relocation if the symbolic operand ;; HP linker to eliminate the dp relocation if the symbolic operand
;; lives in the TEXT space. ;; lives in the TEXT space.
...@@ -3156,13 +3123,14 @@ ...@@ -3156,13 +3123,14 @@
(define_insn "" (define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand" [(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
"=r,r,r,r,r,Q,*q,!f,f,*TR") "=r,r,r,r,r,r,Q,*q,!f,f,*TR")
(match_operand:DI 1 "move_operand" (match_operand:DI 1 "move_operand"
"r,J,N,K,RQ,rM,rM,!fM,*RT,f"))] "A,r,J,N,K,RQ,rM,rM,!fM,*RT,f"))]
"(register_operand (operands[0], DImode) "(register_operand (operands[0], DImode)
|| reg_or_0_operand (operands[1], DImode)) || reg_or_0_operand (operands[1], DImode))
&& ! TARGET_SOFT_FLOAT && TARGET_64BIT" && ! TARGET_SOFT_FLOAT && TARGET_64BIT"
"@ "@
ldd RT'%A1,%0
copy %1,%0 copy %1,%0
ldi %1,%0 ldi %1,%0
ldil L'%1,%0 ldil L'%1,%0
...@@ -3173,9 +3141,9 @@ ...@@ -3173,9 +3141,9 @@
fcpy,dbl %f1,%0 fcpy,dbl %f1,%0
fldd%F1 %1,%0 fldd%F1 %1,%0
fstd%F0 %1,%0" fstd%F0 %1,%0"
[(set_attr "type" "move,move,move,shift,load,store,move,fpalu,fpload,fpstore") [(set_attr "type" "load,move,move,move,shift,load,store,move,fpalu,fpload,fpstore")
(set_attr "pa_combine_type" "addmove") (set_attr "pa_combine_type" "addmove")
(set_attr "length" "4,4,4,4,4,4,4,4,4,4")]) (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4")])
(define_insn "" (define_insn ""
[(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand" [(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
......
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