Commit f6284d97 by Nick Clifton Committed by Nick Clifton

mn10300.md: (call_internal): Remove mode on operand 0 in order to match UNPSEC'ed calls...

* config/mn10300/mn10300.md: (call_internal): Remove mode on
  operand 0 in order to match UNPSEC'ed calls generated in PIC mode.
  (call_value_internal): Remove mode on operands 0 and 1 in order to
  match UNPSEC'ed calls generated in PIC mode.
  (GOTaddr2picreg): Use copy_rtx to prevent sharing an rtx between
  two insns.

From-SVN: r130437
parent 5e043dc9
2007-11-26 Nick Clifton <nickc@redhat.com>
* config/mn10300/mn10300.md: (call_internal): Remove mode on
operand 0 in order to match UNPSEC'ed calls generated in PIC mode.
(call_value_internal): Remove mode on operands 0 and 1 in order to
match UNPSEC'ed calls generated in PIC mode.
(GOTaddr2picreg): Use copy_rtx to prevent sharing an rtx between
two insns.
2007-11-26 Richard Guenther <rguenther@suse.de> 2007-11-26 Richard Guenther <rguenther@suse.de>
PR middle-end/34233 PR middle-end/34233
...@@ -1819,8 +1819,10 @@ ...@@ -1819,8 +1819,10 @@
DONE; DONE;
}") }")
;; NB: Mode on match_operand 0 deliberately omitted in
;; order to be able to match UNSPECs in PIC mode.
(define_insn "call_internal" (define_insn "call_internal"
[(call (mem:QI (match_operand:SI 0 "call_address_operand" "aS")) [(call (mem:QI (match_operand 0 "call_address_operand" "aS"))
(match_operand:SI 1 "general_operand" "g"))] (match_operand:SI 1 "general_operand" "g"))]
"" ""
"* "*
...@@ -1864,9 +1866,11 @@ ...@@ -1864,9 +1866,11 @@
DONE; DONE;
}") }")
;; NB: Mode on match_operands 0 and 1 deliberately omitted
;; in order to be able to match UNSPECs in PIC mode.
(define_insn "call_value_internal" (define_insn "call_value_internal"
[(set (match_operand 0 "" "=dax") [(set (match_operand 0 "register_operand" "=dax")
(call (mem:QI (match_operand:SI 1 "call_address_operand" "aS")) (call (mem:QI (match_operand 1 "call_address_operand" "aS"))
(match_operand:SI 2 "general_operand" "g")))] (match_operand:SI 2 "general_operand" "g")))]
"" ""
"* "*
...@@ -2560,7 +2564,7 @@ ...@@ -2560,7 +2564,7 @@
emit_insn (gen_am33_loadPC (operands[0])); emit_insn (gen_am33_loadPC (operands[0]));
else else
emit_insn (gen_mn10300_loadPC (operands[0])); emit_insn (gen_mn10300_loadPC (operands[0]));
emit_insn (gen_add_GOT_to_pic_reg (operands[0])); emit_insn (gen_add_GOT_to_pic_reg (copy_rtx (operands[0])));
DONE; DONE;
} }
") ")
......
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