Commit f56e86bd by Jan Hubicka Committed by Jan Hubicka

re PR target/8343 ([m68k] [3.2 regression] m68k-elf/rtems ICE at instantiate_virtual_regs_1)

	* i386.md (*mul*): FIx constraints; remove confused comment; fix
	athlon_decode attributes
	(imul/k8 optimization peep2s): New.

	* athlon.md (athlon_ssecmp*): Handle ssecomi as well.
	* i386.md (type attribute): Add ssecomi.
	(unit, memory, prefix attributes): Handle ssecomi.
	(cvt?2? patterns): Fix athlon_decode attribute
	(comi patterns): Set attribute to ssecomi.

	PR target/8343
	* m68k.md (umulsidi, mulsidi expanders): Use register operand.

From-SVN: r61098
parent 98c29f71
Thu Jan 9 12:00:36 CET 2003 Jan Hubicka <jh@suse.cz>
* i386.md (*mul*): FIx constraints; remove confused comment; fix
athlon_decode attributes
(imul/k8 optimization peep2s): New.
* athlon.md (athlon_ssecmp*): Handle ssecomi as well.
* i386.md (type attribute): Add ssecomi.
(unit, memory, prefix attributes): Handle ssecomi.
(cvt?2? patterns): Fix athlon_decode attribute
(comi patterns): Set attribute to ssecomi.
PR target/8343
* m68k.md (umulsidi, mulsidi expanders): Use register operand.
2003-01-09 Richard Sandiford <rsandifo@redhat.com> 2003-01-09 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.h (PREDICATE_CODES): Add ADDRESSOF for predicates * config/mips/mips.h (PREDICATE_CODES): Add ADDRESSOF for predicates
......
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
;; The load/store queue unit is not attached to the schedulers but ;; The load/store queue unit is not attached to the schedulers but
;; communicates with all the execution units separately instead. ;; communicates with all the execution units separately instead.
(define_attr "athlon_decode" "direct,vector" (define_attr "athlon_decode" "direct,vector,double"
(cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,leave") (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,leave")
(const_string "vector") (const_string "vector")
(and (eq_attr "type" "push") (and (eq_attr "type" "push")
...@@ -496,32 +496,32 @@ ...@@ -496,32 +496,32 @@
"athlon-double,athlon-fmul") "athlon-double,athlon-fmul")
(define_insn_reservation "athlon_ssecmp_load" 5 (define_insn_reservation "athlon_ssecmp_load" 5
(and (eq_attr "cpu" "athlon,k8") (and (eq_attr "cpu" "athlon,k8")
(and (eq_attr "type" "ssecmp") (and (eq_attr "type" "ssecmp,ssecomi")
(and (eq_attr "mode" "SF,DF") (and (eq_attr "mode" "SF,DF")
(eq_attr "memory" "load")))) (eq_attr "memory" "load"))))
"athlon-vector,athlon-load,athlon-fadd") "athlon-vector,athlon-load,athlon-fadd")
(define_insn_reservation "athlon_ssecmp" 2 (define_insn_reservation "athlon_ssecmp" 2
(and (eq_attr "cpu" "athlon,k8") (and (eq_attr "cpu" "athlon,k8")
(and (eq_attr "type" "ssecmp") (and (eq_attr "type" "ssecmp,ssecomi")
(eq_attr "mode" "SF,DF"))) (eq_attr "mode" "SF,DF")))
"athlon-direct,athlon-fadd") "athlon-direct,athlon-fadd")
(define_insn_reservation "athlon_ssecmpvector_load" 6 (define_insn_reservation "athlon_ssecmpvector_load" 6
(and (eq_attr "cpu" "athlon") (and (eq_attr "cpu" "athlon")
(and (eq_attr "type" "ssecmp") (and (eq_attr "type" "ssecmp,ssecomi")
(eq_attr "memory" "load"))) (eq_attr "memory" "load")))
"athlon-vector,athlon-fadd") "athlon-vector,athlon-fadd")
(define_insn_reservation "athlon_ssecmpvector_load_k8" 5 (define_insn_reservation "athlon_ssecmpvector_load_k8" 5
(and (eq_attr "cpu" "k8") (and (eq_attr "cpu" "k8")
(and (eq_attr "type" "ssecmp") (and (eq_attr "type" "ssecmp,ssecomi")
(eq_attr "memory" "load"))) (eq_attr "memory" "load")))
"athlon-double,athlon-fadd") "athlon-double,athlon-fadd")
(define_insn_reservation "athlon_ssecmpvector" 3 (define_insn_reservation "athlon_ssecmpvector" 3
(and (eq_attr "cpu" "athlon") (and (eq_attr "cpu" "athlon")
(eq_attr "type" "ssecmp")) (eq_attr "type" "ssecmp,ssecomi"))
"athlon-vector,athlon-fadd") "athlon-vector,athlon-fadd")
(define_insn_reservation "athlon_ssecmpvector_k8" 3 (define_insn_reservation "athlon_ssecmpvector_k8" 3
(and (eq_attr "cpu" "k8") (and (eq_attr "cpu" "k8")
(eq_attr "type" "ssecmp")) (eq_attr "type" "ssecmp,ssecomi"))
"athlon-double,athlon-fadd") "athlon-double,athlon-fadd")
(define_insn_reservation "athlon_sseadd_load" 7 (define_insn_reservation "athlon_sseadd_load" 7
(and (eq_attr "cpu" "athlon") (and (eq_attr "cpu" "athlon")
......
...@@ -3122,7 +3122,7 @@ ...@@ -3122,7 +3122,7 @@
[(parallel [(parallel
[(set (subreg:SI (match_operand:DI 0 "register_operand" "") 4) [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 4)
(mult:SI (match_operand:SI 1 "register_operand" "") (mult:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonimmediate_operand" ""))) (match_operand:SI 2 "register_operand" "")))
(set (subreg:SI (match_dup 0) 0) (set (subreg:SI (match_dup 0) 0)
(truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1)) (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
(zero_extend:DI (match_dup 2))) (zero_extend:DI (match_dup 2)))
...@@ -3161,7 +3161,7 @@ ...@@ -3161,7 +3161,7 @@
[(parallel [(parallel
[(set (subreg:SI (match_operand:DI 0 "register_operand" "") 4) [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 4)
(mult:SI (match_operand:SI 1 "register_operand" "") (mult:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonimmediate_operand" ""))) (match_operand:SI 2 "register_operand" "")))
(set (subreg:SI (match_dup 0) 0) (set (subreg:SI (match_dup 0) 0)
(truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1)) (truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
(sign_extend:DI (match_dup 2))) (sign_extend:DI (match_dup 2)))
......
/* C code produced by gperf version 2.7 */ /* C code produced by gperf version 2.7.2 */
/* Command-line: gperf -L C -C -F , 0 -p -t -j1 -i 1 -g -o -N java_keyword -k1,4,$ keyword.gperf */ /* Command-line: gperf -L C -C -F ', 0' -p -t -j1 -i 1 -g -o -N java_keyword -k'1,4,$' keyword.gperf */
/* Keyword definition for the GNU compiler for the Java(TM) language. /* Keyword definition for the GNU compiler for the Java(TM) language.
Copyright (C) 1997, 1998, 2003 Free Software Foundation, Inc. Copyright (C) 1997, 1998, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by Alexandre Petit-Bianco (apbianco@cygnus.com) Contributed by Alexandre Petit-Bianco (apbianco@cygnus.com)
This file is part of GCC. This file is part of GCC.
...@@ -44,6 +45,10 @@ const struct java_keyword *java_keyword PARAMS ((const char *, unsigned int)); ...@@ -44,6 +45,10 @@ const struct java_keyword *java_keyword PARAMS ((const char *, unsigned int));
#ifdef __GNUC__ #ifdef __GNUC__
__inline __inline
#else
#ifdef __cplusplus
inline
#endif
#endif #endif
static unsigned int static unsigned int
hash (str, len) hash (str, len)
...@@ -105,7 +110,8 @@ java_keyword (str, len) ...@@ -105,7 +110,8 @@ java_keyword (str, len)
{ {
static const struct java_keyword wordlist[] = static const struct java_keyword wordlist[] =
{ {
{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0},
{"", 0},
{"else", ELSE_TK}, {"else", ELSE_TK},
{"true", TRUE_TK}, {"true", TRUE_TK},
{"case", CASE_TK}, {"case", CASE_TK},
...@@ -163,8 +169,9 @@ java_keyword (str, len) ...@@ -163,8 +169,9 @@ java_keyword (str, len)
{"", 0}, {"", 0},
{"finally", FINALLY_TK}, {"finally", FINALLY_TK},
{"throw", THROW_TK}, {"throw", THROW_TK},
{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0},
{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0},
{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0},
{"", 0}, {"", 0}, {"", 0},
{"strictfp", STRICT_TK}, {"strictfp", STRICT_TK},
{"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0}, {"", 0},
{"private", PRIVATE_TK} {"private", PRIVATE_TK}
......
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