mips.h (ISA_HAS_LDC1_SDC1): New macro.

gcc/
	* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
	* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
	instead of checking mips_isa.

From-SVN: r129523

gcc/ChangeLog

 2007-10-21  Richard Sandiford  <rsandifo@nildram.co.uk>
 
+	* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
+	* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
+	instead of checking mips_isa.
+
+2007-10-21  Richard Sandiford  <rsandifo@nildram.co.uk>
+
 	* doc/invoke.texi (-mpaired-single): Don't say that the option
 	requires 64-bit code.
 	* config/mips/mips-protos.h (mips_modes_tieable_p): Declare.

gcc/config/mips/mips.c

@@ -3433,9 +3433,8 @@ mips_split_64bit_move_p (rtx dest, rtx src)
   if (FP_REG_RTX_P (src) && FP_REG_RTX_P (dest))
     return false;
 
-  /* Check for floating-point loads and stores.  They can be done using
-     ldc1 and sdc1 on MIPS II and above.  */
-  if (mips_isa > 1)
+  /* Check for floating-point loads and stores.  */
+  if (ISA_HAS_LDC1_SDC1)
     {
       if (FP_REG_RTX_P (dest) && MEM_P (src))
 	return false;

gcc/config/mips/mips.h

@@ -735,6 +735,9 @@ enum mips_code_readable_setting {
 				 && !TARGET_MIPS5500			\
 				 && !TARGET_MIPS16)
 
+/* ISA has LDC1 and SDC1.  */
+#define ISA_HAS_LDC1_SDC1	(!ISA_MIPS1 && !TARGET_MIPS16)
+
 /* ISA has the mips4 FP condition code instructions: FP-compare to CC,
    branch on CC, and move (both FP and non-FP) on CC.  */
 #define ISA_HAS_8CC		(ISA_MIPS4				\