Commit f3cd5375 by Jim Wilson

(output_stack_adjust): Reorganize code for readability.

If size is negative, negate and subtract it instead of adding it.

From-SVN: r13847
parent 20ec31d3
...@@ -2485,38 +2485,42 @@ output_stack_adjust (size, reg, temp) ...@@ -2485,38 +2485,42 @@ output_stack_adjust (size, reg, temp)
{ {
if (size) if (size)
{ {
rtx val = GEN_INT (size); if (CONST_OK_FOR_I (size))
rtx insn; emit_insn (gen_addsi3 (reg, reg, GEN_INT (size)));
/* Try to do it with two partial adjustments; however, we must make
if (! CONST_OK_FOR_I (size))
{
/* Try to do it with two partial adjustments; however, must make
sure that the stack is properly aligned at all times, in case sure that the stack is properly aligned at all times, in case
an interrupt occurs between the two partial adjustments. */ an interrupt occurs between the two partial adjustments. */
if (CONST_OK_FOR_I (size / 2 & -4) else if (CONST_OK_FOR_I (size / 2 & -4)
&& CONST_OK_FOR_I (size - (size / 2 & -4))) && CONST_OK_FOR_I (size - (size / 2 & -4)))
{ {
val = GEN_INT (size / 2 & -4); emit_insn (gen_addsi3 (reg, reg, GEN_INT (size / 2 & -4)));
emit_insn (gen_addsi3 (reg, reg, val)); emit_insn (gen_addsi3 (reg, reg, GEN_INT (size - (size / 2 & -4))));
val = GEN_INT (size - (size / 2 & -4));
} }
else else
{ {
rtx reg; rtx const_reg;
/* If TEMP is invalid, we could temporarily save a general /* If TEMP is invalid, we could temporarily save a general
register to MACL. However, there is currently no need register to MACL. However, there is currently no need
to handle this case, so just abort when we see it. */ to handle this case, so just abort when we see it. */
if (temp < 0) if (temp < 0)
abort (); abort ();
reg = gen_rtx (REG, SImode, temp); const_reg = gen_rtx (REG, SImode, temp);
emit_insn (gen_movsi (reg, val));
val = reg; /* If SIZE is negative, subtract the positive value.
This sometimes allows a constant pool entry to be shared
between prologue and epilogue code. */
if (size < 0)
{
emit_insn (gen_movsi (const_reg, GEN_INT (-size)));
emit_insn (gen_subsi3 (reg, reg, const_reg));
}
else
{
emit_insn (gen_movsi (const_reg, GEN_INT (size)));
emit_insn (gen_addsi3 (reg, reg, const_reg));
} }
} }
insn = gen_addsi3 (reg, reg, val);
emit_insn (insn);
} }
} }
......
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