Commit f326a6cb by Naveen.H.S Committed by Kaz Kojima

sh.c (sh_expand_t_scc): Emit movrt for SH2A if possible.

	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
	possible.
	* config/sh/sh.md (xorsi3_movrt, movrt): New insns.

	* gcc.target/sh/sh2a-movrt.c: New test.

From-SVN: r133517
parent b4b0018b
2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com> 2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com>
* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
possible.
* config/sh/sh.md (xorsi3_movrt, movrt): New insns.
2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com>
* config/sh/sh.md (prefetch): Add condition for SH2A target. * config/sh/sh.md (prefetch): Add condition for SH2A target.
(prefetch_sh2a): New. (prefetch_sh2a): New.
......
...@@ -10605,6 +10605,9 @@ sh_expand_t_scc (enum rtx_code code, rtx target) ...@@ -10605,6 +10605,9 @@ sh_expand_t_scc (enum rtx_code code, rtx target)
val = INTVAL (sh_compare_op1); val = INTVAL (sh_compare_op1);
if ((code == EQ && val == 1) || (code == NE && val == 0)) if ((code == EQ && val == 1) || (code == NE && val == 0))
emit_insn (gen_movt (result)); emit_insn (gen_movt (result));
else if (TARGET_SH2A && ((code == EQ && val == 0)
|| (code == NE && val == 1)))
emit_insn (gen_movrt (result));
else if ((code == EQ && val == 0) || (code == NE && val == 1)) else if ((code == EQ && val == 0) || (code == NE && val == 1))
{ {
emit_insn (gen_rtx_CLOBBER (VOIDmode, result)); emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
......
...@@ -3326,6 +3326,15 @@ label: ...@@ -3326,6 +3326,15 @@ label:
xori %1, %2, %0" xori %1, %2, %0"
[(set_attr "type" "arith_media")]) [(set_attr "type" "arith_media")])
;; Store the complements of the T bit in a register.
(define_insn "xorsi3_movrt"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(xor:SI (reg:SI T_REG)
(const_int 1)))]
"TARGET_SH2A"
"movrt\\t%0"
[(set_attr "type" "arith")])
(define_insn "xordi3" (define_insn "xordi3"
[(set (match_operand:DI 0 "arith_reg_dest" "=r,r") [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
(xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r") (xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")
...@@ -9545,6 +9554,16 @@ mov.l\\t1f,r0\\n\\ ...@@ -9545,6 +9554,16 @@ mov.l\\t1f,r0\\n\\
"movt %0" "movt %0"
[(set_attr "type" "arith")]) [(set_attr "type" "arith")])
;; complements the T bit and stores the result in a register
(define_insn "movrt"
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
(const_int 1)
(const_int 0)))]
"TARGET_SH2A"
"movrt\\t%0"
[(set_attr "type" "arith")])
(define_expand "seq" (define_expand "seq"
[(set (match_operand:SI 0 "arith_reg_dest" "") [(set (match_operand:SI 0 "arith_reg_dest" "")
(match_dup 1))] (match_dup 1))]
......
2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com> 2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com>
* gcc.target/sh/sh2a-movrt.c: New test.
2008-03-25 Naveen.H.S <naveen.hs@kpitcummins.com>
* gcc.target/sh/sh2a-prefetch.c: New test. * gcc.target/sh/sh2a-prefetch.c: New test.
2008-03-25 Jayant Sonar <Jayant.sonar@kpitcummins.com> 2008-03-25 Jayant Sonar <Jayant.sonar@kpitcummins.com>
/* Testcase to check generation of a SH2A specific instruction for
'MOVRT Rn'. */
/* { dg-do assemble {target sh*-*-*}} */
/* { dg-options "-O1" } */
/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" } */
/* { dg-final { scan-assembler "movrt"} } */
int
foo (void)
{
int a, b, g, stop;
if (stop = ((a + b) % 2 != g))
;
return stop;
}
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