Commit f316c3e5 by Jakub Jelinek Committed by Jakub Jelinek

re PR target/88188 (ICE in print_operand, at config/rs6000/rs6000.c)

	PR target/88188
	* config/rs6000/rs6000.c (print_operand) <case 'D'>: Use
	output_operand_lossage instead of gcc_assert.
	<case 't'>: Likewise.
	<case 'z'>: Likewise.
	<case 'V'>: Use output_operand_lossage instead of gcc_unreachable.

	* gcc.target/powerpc/pr88188.c: New test.

From-SVN: r266515
parent cece89d0
2018-11-27 Jakub Jelinek <jakub@redhat.com>
PR target/88188
* config/rs6000/rs6000.c (print_operand) <case 'D'>: Use
output_operand_lossage instead of gcc_assert.
<case 't'>: Likewise.
<case 'z'>: Likewise.
<case 'V'>: Use output_operand_lossage instead of gcc_unreachable.
2018-11-27 Jeff Law <law@redhat.com> 2018-11-27 Jeff Law <law@redhat.com>
* config/riscv/riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN * config/riscv/riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN
...@@ -20644,7 +20644,11 @@ print_operand (FILE *file, rtx x, int code) ...@@ -20644,7 +20644,11 @@ print_operand (FILE *file, rtx x, int code)
case 'D': case 'D':
/* Like 'J' but get to the GT bit only. */ /* Like 'J' but get to the GT bit only. */
gcc_assert (REG_P (x)); if (!REG_P (x))
{
output_operand_lossage ("invalid %%D value");
return;
}
/* Bit 1 is GT bit. */ /* Bit 1 is GT bit. */
i = 4 * (REGNO (x) - CR0_REGNO) + 1; i = 4 * (REGNO (x) - CR0_REGNO) + 1;
...@@ -20900,7 +20904,11 @@ print_operand (FILE *file, rtx x, int code) ...@@ -20900,7 +20904,11 @@ print_operand (FILE *file, rtx x, int code)
case 't': case 't':
/* Like 'J' but get to the OVERFLOW/UNORDERED bit. */ /* Like 'J' but get to the OVERFLOW/UNORDERED bit. */
gcc_assert (REG_P (x) && GET_MODE (x) == CCmode); if (!REG_P (x) || GET_MODE (x) != CCmode)
{
output_operand_lossage ("invalid %%t value");
return;
}
/* Bit 3 is OV bit. */ /* Bit 3 is OV bit. */
i = 4 * (REGNO (x) - CR0_REGNO) + 3; i = 4 * (REGNO (x) - CR0_REGNO) + 3;
...@@ -20989,7 +20997,7 @@ print_operand (FILE *file, rtx x, int code) ...@@ -20989,7 +20997,7 @@ print_operand (FILE *file, rtx x, int code)
fputs ("lge", file); /* 5 */ fputs ("lge", file); /* 5 */
break; break;
default: default:
gcc_unreachable (); output_operand_lossage ("invalid %%V value");
} }
break; break;
...@@ -21059,7 +21067,11 @@ print_operand (FILE *file, rtx x, int code) ...@@ -21059,7 +21067,11 @@ print_operand (FILE *file, rtx x, int code)
names. If we are configured for System V (or the embedded ABI) on names. If we are configured for System V (or the embedded ABI) on
the PowerPC, do not emit the period, since those systems do not use the PowerPC, do not emit the period, since those systems do not use
TOCs and the like. */ TOCs and the like. */
gcc_assert (GET_CODE (x) == SYMBOL_REF); if (!SYMBOL_REF_P (x))
{
output_operand_lossage ("invalid %%z value");
return;
}
/* For macho, check to see if we need a stub. */ /* For macho, check to see if we need a stub. */
if (TARGET_MACHO) if (TARGET_MACHO)
2018-11-27 Jakub Jelinek <jakub@redhat.com>
PR target/88188
* gcc.target/powerpc/pr88188.c: New test.
2018-11-27 Martin Liska <mliska@suse.cz> 2018-11-27 Martin Liska <mliska@suse.cz>
* gfortran.dg/simd-builtins-1.f90: New test. * gfortran.dg/simd-builtins-1.f90: New test.
......
...@@ -23,5 +23,5 @@ int h(int a, int b, int c, int d) ...@@ -23,5 +23,5 @@ int h(int a, int b, int c, int d)
return a; return a;
} }
/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { ! logical_op_short_circuit } } } } */ /* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { { ! logical_op_short_circuit } || branch_cost } } } } */
/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target logical_op_short_circuit } } } */ /* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target { logical_op_short_circuit && { ! branch_cost } } } } } */
/* PR target/88188 */
/* { dg-do compile } */
int m;
void
foo (void)
{
__asm volatile ("%D0" : : "m" (m)); /* { dg-error "invalid %D value" } */
__asm volatile ("%t0" : : "m" (m)); /* { dg-error "invalid %t value" } */
__asm volatile ("%V0" : : "r" (0)); /* { dg-error "invalid %V value" } */
__asm volatile ("%z0" : : "r" (0)); /* { dg-error "invalid %z value" } */
}
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