Commit f06257d3 by Adam Nemet Committed by Adam Nemet

mips.md (store): Add attributes for QI and HI.

	* config/mips/mips.md (store): Add attributes for QI and HI.
	Update comment.
	(truncdisi2, truncdihi2, truncdiqi2): Merge these into ...
	(truncdi<mode>2): ... this new pattern.

From-SVN: r147503
parent c7bda60e
2009-05-13 Adam Nemet <anemet@caviumnetworks.com>
* config/mips/mips.md (store): Add attributes for QI and HI.
Update comment.
(truncdisi2, truncdihi2, truncdiqi2): Merge these into ...
(truncdi<mode>2): ... this new pattern.
2009-05-13 Brad Hards <bradh@kde.org> 2009-05-13 Brad Hards <bradh@kde.org>
* Makefile.in (TEXI_GCCINT_FILES): Add plugins.texi. * Makefile.in (TEXI_GCCINT_FILES): Add plugins.texi.
......
...@@ -727,9 +727,10 @@ ...@@ -727,9 +727,10 @@
;; This attributes gives the mode mask of a SHORT. ;; This attributes gives the mode mask of a SHORT.
(define_mode_attr mask [(QI "0x00ff") (HI "0xffff")]) (define_mode_attr mask [(QI "0x00ff") (HI "0xffff")])
;; Mode attributes for GPR loads and stores. ;; Mode attributes for GPR loads.
(define_mode_attr load [(SI "lw") (DI "ld")]) (define_mode_attr load [(SI "lw") (DI "ld")])
(define_mode_attr store [(SI "sw") (DI "sd")]) ;; Instruction names for stores.
(define_mode_attr store [(QI "sb") (HI "sh") (SI "sw") (DI "sd")])
;; Similarly for MIPS IV indexed FPR loads and stores. ;; Similarly for MIPS IV indexed FPR loads and stores.
(define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1") (V2SF "ldxc1")]) (define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1") (V2SF "ldxc1")])
...@@ -2692,33 +2693,13 @@ ...@@ -2692,33 +2693,13 @@
;; ;;
;; Step A needs a real instruction but step B does not. ;; Step A needs a real instruction but step B does not.
(define_insn "truncdisi2" (define_insn "truncdi<mode>2"
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,m") [(set (match_operand:SUBDI 0 "nonimmediate_operand" "=d,m")
(truncate:SI (match_operand:DI 1 "register_operand" "d,d")))] (truncate:SUBDI (match_operand:DI 1 "register_operand" "d,d")))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
sll\t%0,%1,0 sll\t%0,%1,0
sw\t%1,%0" <store>\t%1,%0"
[(set_attr "move_type" "sll0,store")
(set_attr "mode" "SI")])
(define_insn "truncdihi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,m")
(truncate:HI (match_operand:DI 1 "register_operand" "d,d")))]
"TARGET_64BIT"
"@
sll\t%0,%1,0
sh\t%1,%0"
[(set_attr "move_type" "sll0,store")
(set_attr "mode" "SI")])
(define_insn "truncdiqi2"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,m")
(truncate:QI (match_operand:DI 1 "register_operand" "d,d")))]
"TARGET_64BIT"
"@
sll\t%0,%1,0
sb\t%1,%0"
[(set_attr "move_type" "sll0,store") [(set_attr "move_type" "sll0,store")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
......
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