Commit ed9d5a4a by Uros Bizjak

re PR c/39779 (ICE shifting byte to the right with constant > 7FFFFFFF)

	PR rtl-optimization/39779
	* expr.c (convert_modes): Return when mode == oldmode after
	CONST_INTs are processed.

testsuite/ChangeLog:

	PR rtl-optimization/39779
	* gcc.dg/pr39979.c: New test.

From-SVN: r151573
parent 3d887721
2009-09-09 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/39779
* expr.c (convert_modes): Return when mode == oldmode after
CONST_INTs are processed.
2009-09-09 Kai Tietz <kai.tietz@onevision.com>
PR/41315
* config/i386.c (ix86_can_use_return_insn_p): Check for
padding0, too.
* config/i386.c (ix86_can_use_return_insn_p): Check for padding0, too.
(ix86_expand_prologue): Take frame.padding0 into logic of
to_allocate checks.
(ix86_expand_epilogue): Likewise.
......@@ -205,12 +210,12 @@
From Mike Frysinger <michael.frysinger@analog.com>
* config/bfin/bfin-protos.h (bfin_cpu_type): Add BFIN_CPU_BF542M,
BFIN_CPU_BF544M, BFIN_CPU_BF547M, BFIN_CPU_BF548M, and BFIN_CPU_BF549M.
* config/bfin/bfin.c (bfin_cpus[]): Add 0.3 for bf542m, bf544m, bf547m,
bf548m, and bf549m.
* config/bfin/bfin.c (bfin_cpus[]): Add 0.3 for bf542m, bf544m,
bf547m, bf548m, and bf549m.
* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define __ADSPBF542M__
for BFIN_CPU_BF542M, __ADSPBF544M__ for BFIN_CPU_BF544M, __ADSPBF547M__
for BFIN_CPU_BF547M, __ADSPBF548M__ for BFIN_CPU_BF548M, and
__ADSPBF549M__ for BFIN_CPU_BF549M.
for BFIN_CPU_BF542M, __ADSPBF544M__ for BFIN_CPU_BF544M,
__ADSPBF547M__ for BFIN_CPU_BF547M, __ADSPBF548M__ for
BFIN_CPU_BF548M, and __ADSPBF549M__ for BFIN_CPU_BF549M.
* config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
bf542m-none, bf544m-none, bf547m-none, bf548m-none, and bf549m-none.
* config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
......@@ -219,17 +224,14 @@
bf542m, bf544m, bf547m, bf548m, and bf549m.
From Jie Zhang <jie.zhang@analog.com>:
* config/bfin/predicates.md (p_register_operand): New
predicate.
* config/bfin/predicates.md (p_register_operand): New predicate.
(dp_register_operand): New predicate.
* config/bfin/bfin-protos.h (WA_05000074): Define.
(ENABLE_WA_05000074): Define.
* config/bfin/bfin.c (bfin_cpus[]): Add WA_05000074 for
all cpus.
* config/bfin/bfin.c (bfin_cpus[]): Add WA_05000074 for all cpus.
(bfin_gen_bundles): Put dsp32shiftimm instruction in slot[0].
* config/bfin/bfin.md (define_attr type): Add dsp32shiftimm.
(define_attr addrtype): Allow load/store register to be
P register.
(define_attr addrtype): Allow load/store register to be P register.
(define_attr storereg): New.
(define_cpu_unit anomaly_05000074): New.
(define_insn_reservation dsp32shiftimm): New.
......@@ -670,8 +672,7 @@
expand_expr_real_2): Declare.
* expr.c (emit_storent_insn, expand_expr_real_1,
expand_expr_real_2): Export.
(store_expr): Setting and evaluating dont_return_target is
useless.
(store_expr): Setting and evaluating dont_return_target is useless.
(expand_expr_real_1, <case GOTO_EXPR, RETURN_EXPR, SWITCH_EXPR,
LABEL_EXPR and ASM_EXPR>): Move to gcc_unreachable.
* except.c (expand_resx_expr): Rename to ...
......@@ -728,8 +729,7 @@
(update_register_pressure, setup_insn_max_reg_pressure,
update_reg_and_insn_max_reg_pressure,
sched_setup_bb_reg_pressure_info): New functions.
(schedule_insn): Add code for printing and updating reg pressure
info.
(schedule_insn): Add code for printing and updating reg pressure info.
(find_set_reg_weight, find_insn_reg_weight): Remove.
(ok_for_early_queue_removal): Do nothing if pressure_only_p.
(debug_ready_list): Print reg pressure info.
......@@ -795,8 +795,7 @@
(common_classes): Rename to regno_cover_class.
(COST_INDEX): New.
(record_reg_classes): Set allocno attributes only if allocno_p.
(record_address_regs): Ditto. Use COST_INDEX instead of
ALLOCNO_NUM.
(record_address_regs): Ditto. Use COST_INDEX instead of ALLOCNO_NUM.
(scan_one_insn): Use COST_INDEX and COSTS instead of ALLOCNO_NUM
and COSTS_OF_ALLOCNO.
(print_costs): Rename to print_allocno_costs.
......@@ -822,8 +821,7 @@
(setup_reg_classes): Add new parameter.
* sched-int.h (struct deps_reg): New member implicit_sets.
(sched_pressure_p, sched_regno_cover_class): New external
definitions.
(sched_pressure_p, sched_regno_cover_class): New external definitions.
(INCREASE_BITS): New macro.
(struct reg_pressure_data, struct reg_use_data): New.
(struct _haifa_insn_data): Remove reg_weight. Add members
......@@ -835,8 +833,7 @@
(struct reg_pressure_data, struct reg_use_data): New.
(INSN_REG_WEIGHT): Remove.
(INSN_REG_PRESSURE, INSN_MAX_REG_PRESSURE, INSN_REG_USE_LIST,
INSN_REG_SET_LIST, INSN_REG_PRESSURE_EXCESS_COST_CHANGE): New
macros.
INSN_REG_SET_LIST, INSN_REG_PRESSURE_EXCESS_COST_CHANGE): New macros.
(sched_init_region_reg_pressure_info,
sched_setup_bb_reg_pressure_info): New prototypes.
......@@ -848,8 +845,8 @@
(resize_reg_info): Use reg_info_size. Return flag of resizing.
(setup_reg_classes): Add a new parameter. Setup cover class too.
* Makefile.in (reload.o, haifa-sched.o, sched-deps.o): Add ira.h to the
dependencies.
* Makefile.in (reload.o, haifa-sched.o, sched-deps.o): Add ira.h to
the dependencies.
* sched-rgn.c (deps_join): Set up implicit_sets.
(schedule_region): Set up region and basic blocks pressure
......@@ -904,8 +901,7 @@
* regrename.c (regrename_optimize): Drop last. Don't count debug
insns as uses. Don't reject change because of debug insn.
(do_replace): Reject DEBUG_INSN as chain starter. Take base_regno
from the chain starter, and check for inexact matches in
DEBUG_INSNS.
from the chain starter, and check for inexact matches in DEBUG_INSNS.
(scan_rtx_reg): Accept inexact matches in DEBUG_INSNs.
(build_def_use): Simplify and fix the marking of DEBUG_INSNs.
* sched-ebb.c (schedule_ebbs): Skip boundary debug insns.
......@@ -1052,8 +1048,7 @@
(fur_orig_expr_not_found): Skip debug insns.
* rtl.def (VALUE): Move up.
(DEBUG_INSN): New.
* tree-ssa-sink.c (all_immediate_uses_same_place): Skip debug
stmts.
* tree-ssa-sink.c (all_immediate_uses_same_place): Skip debug stmts.
(nearest_common_dominator_of_uses): Take debug_stmts argument.
Set it if debug stmts are found.
(statement_sink_location): Skip debug stmts. Propagate
......@@ -1123,8 +1118,7 @@
in its expression.
* cfgbuild.c (inside_basic_block_p): Handle debug insns.
(control_flow_insn_p): Likewise.
* tree-parloops.c (eliminate_local_variables_stmt): Handle debug
stmt.
* tree-parloops.c (eliminate_local_variables_stmt): Handle debug stmt.
(separate_decls_in_region_debug_bind): New.
(separate_decls_in_region): Process debug bind stmts afterwards.
* recog.c (verify_changes): Handle debug insns.
......@@ -1157,8 +1151,7 @@
* function.c (instantiate_virtual_regs): Handle debug insns.
* function.h (struct emit_status): Add x_cur_debug_insn_uid.
* print-rtl.h: Include cselib.h.
(print_rtx): Print VALUEs. Split out and recurse for
VAR_LOCATIONs.
(print_rtx): Print VALUEs. Split out and recurse for VAR_LOCATIONs.
* df.h (df_inns_rescan_debug_internal): Declare.
* gcse.c (alloc_hash_table): Estimate n_insns.
(cprop_insn): Don't regard debug insns as changes.
......@@ -1259,8 +1252,7 @@
(cselib_subst_to_values): Adjust.
(cselib_log_lookup): New.
(cselib_lookup): Call it.
(cselib_invalidate_regno): Don't count preserved values as
useless.
(cselib_invalidate_regno): Don't count preserved values as useless.
(cselib_invalidate_mem): Likewise.
(cselib_record_set): Likewise.
(struct set): Renamed to cselib_set, moved to cselib.h.
......@@ -1379,8 +1371,7 @@
(copy_body): Copy debug stmts at the end.
(insert_init_debug_bind): New.
(insert_init_stmt): Take id. Skip and emit debug stmts.
(setup_one_parameter): Remap variable earlier, register debug
mapping.
(setup_one_parameter): Remap variable earlier, register debug mapping.
(estimate_num_insns): Skip debug stmts.
(expand_call_inline): Preserve debug_map.
(optimize_inline_calls): Check for no debug_stmts left-overs.
......@@ -1489,8 +1480,7 @@
(dataflow_set_clear_at_call): New.
(onepart_variable_different_p): New.
(variable_different_p): Use it.
(dataflow_set_different_1): Adjust. Make detailed dump
more verbose.
(dataflow_set_different_1): Adjust. Make detailed dump more verbose.
(track_expr_p): Add need_rtl parameter. Don't generate rtl
if not needed.
(track_loc_p): Pass it true.
......@@ -1538,8 +1528,8 @@
(emit_notes_for_differences_1): Adjust. Handle values.
(emit_notes_for_differences_2): Likewise.
(emit_notes_for_differences): Adjust.
(emit_notes_in_bb): Take pointer to set. Emit AFTER_CALL_INSN
notes. Adjust. Handle new micro-ops.
(emit_notes_in_bb): Take pointer to set. Emit AFTER_CALL_INSN notes.
Adjust. Handle new micro-ops.
(vt_add_function_parameters): Adjust. Create and bind values.
(vt_initialize): Adjust. Initialize scratch_regs and
valvar_pool, flooded and perm.. Initialize and use cselib. Log
......@@ -1589,8 +1579,7 @@
empty. Traverse changed_variables with check_changed_vars_1,
call check_changed_vars_2 on each changed_variables_stack entry.
(emit_notes_in_bb): Add SET argument. Just clear it at the
beginning, use it instead of local &set, don't destroy it at the
end.
beginning, use it instead of local &set, don't destroy it at the end.
(vt_emit_notes): Call dataflow_set_clear early on all
VTI(bb)->out sets, never use them, instead use emit_notes_in_bb
computed set, dataflow_set_clear also VTI(bb)->in when we are
......@@ -1617,12 +1606,10 @@
(print-rtl.o): Depend on cselib.h.
(cselib.o): Depend on TREE_PASS_H.
(var-tracking.o): Depend on cselib.h and TARGET_H.
* sched-rgn.c (rgn_estimate_number_of_insns): Discount
debug insns.
* sched-rgn.c (rgn_estimate_number_of_insns): Discount debug insns.
(init_ready_list): Skip boundary debug insns.
(add_branch_dependences): Skip debug insns.
(free_block_dependencies): Check for blocks with only debug
insns.
(free_block_dependencies): Check for blocks with only debug insns.
(compute_priorities): Likewise.
* gimple.c (gss_for_code): Handle GIMPLE_DEBUG.
(gimple_build_with_ops_stat): Take subcode as unsigned. Adjust
......@@ -1662,13 +1649,11 @@
(verify_stmt): Likewise.
(debug_loop_num): Skip debug stmts.
(remove_edge_and_dominated_blocks): Remove dominators last.
* tree-ssa-reasssoc.c (rewrite_expr_tree): Propagate into
debug stmts.
* tree-ssa-reasssoc.c (rewrite_expr_tree): Propagate into debug stmts.
(linearize_expr): Likewise.
* config/i386/i386.c (ix86_delegitimize_address): Call
default implementation.
* config/ia64/ia64.c (ia64_safe_itanium_class): Handle debug
insns.
* config/ia64/ia64.c (ia64_safe_itanium_class): Handle debug insns.
(group_barrier_needed): Skip debug insns.
(emit_insn_group_barriers): Likewise.
(emit_all_insn_group_barriers): Likewise.
......@@ -1696,8 +1681,7 @@
* dce.c (deletable_insn_p): Handle VAR_LOCATION.
(mark_reg_dependencies): Skip debug insns.
* params.def (PARAM_MIN_NONDEBUG_INSN_UID): New.
* tree-ssanames.c (release_ssa_name): Propagate def into
debug stmts.
* tree-ssanames.c (release_ssa_name): Propagate def into debug stmts.
* tree-ssa-threadedge.c
(record_temporary_equivalences_from_stmts): Skip debug stmts.
* regcprop.c (replace_oldest_value_addr): Skip debug insns.
......
......@@ -761,9 +761,6 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns
if (GET_MODE (x) != VOIDmode)
oldmode = GET_MODE (x);
if (mode == oldmode)
return x;
/* There is one case that we must handle specially: If we are converting
a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
we are to interpret the constant as unsigned, gen_lowpart will do
......@@ -829,6 +826,9 @@ convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int uns
return gen_lowpart (mode, x);
}
if (mode == oldmode)
return x;
/* Converting from integer constant into mode is always equivalent to an
subreg operation. */
if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
......
2009-09-09 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/39779
* gcc.dg/pr39979.c: New test.
2009-09-09 Richard Guenther <rguenther@suse.de>
PR tree-optimization/41101
......
/* { dg-do compile } */
/* { dg-options "-w" } */
int test (char v1)
{
v1 >>= 0xdebecced;
return v1;
}
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