Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
e7771552
Commit
e7771552
authored
Feb 23, 2018
by
David Edelsohn
Committed by
David Edelsohn
Feb 23, 2018
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
* config/rs6000/aix71.h (TARGET_DEFAULT): Change to ISA_2_5_MASKS_EMBEDDED.
From-SVN: r257944
parent
a26f63a8
Show whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
10 additions
and
1 deletions
+10
-1
gcc/ChangeLog
+5
-0
gcc/config/rs6000/aix71.h
+5
-1
No files found.
gcc/ChangeLog
View file @
e7771552
2018-02-23 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/aix71.h (TARGET_DEFAULT): Change to
ISA_2_5_MASKS_EMBEDDED.
2018-02-23 Jakub Jelinek <jakub@redhat.com>
* ipa-prop.c (ipa_vr_ggc_hash_traits::hash): Hash p->min and
...
...
gcc/config/rs6000/aix71.h
View file @
e7771552
...
...
@@ -127,8 +127,12 @@ do { \
%{mpe: -I%R/usr/lpp/ppe.poe/include} \
%{pthread: -D_THREAD_SAFE}"
#define RS6000_CPU(NAME, CPU, FLAGS)
#include "rs6000-cpus.def"
#undef RS6000_CPU
#undef TARGET_DEFAULT
#define TARGET_DEFAULT
(MASK_PPC_GPOPT | MASK_PPC_GFXOPT | MASK_MFCRF)
#define TARGET_DEFAULT
ISA_2_5_MASKS_EMBEDDED
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_POWER7
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment