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riscv-gcc-1
Commit e62d5d9f by Steven Bosscher
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avr-c.c: Do not include regs.h. 

	* config/avr/avr-c.c: Do not include regs.h.
	Include cpplib.h for cpp_define and tree.h for c-common.h.
	* config/avr/avr-devices.c (avr_mcu_types): Fix initializer.
	* config/avr/t-avr: Fix dependencies for avr-c.o.

From-SVN: r159901
parent d477d1fe
Showing with 44 additions and 37 deletions
gcc/ChangeLog
2010-05-26 Steven Bosscher <steven@gcc.gnu.org> 2010-05-26 Steven Bosscher <steven@gcc.gnu.org>
* config/avr/avr-c.c: Do not include regs.h.
Include cpplib.h for cpp_define and tree.h for c-common.h.
* config/avr/avr-devices.c (avr_mcu_types): Fix initializer.
* config/avr/t-avr: Fix dependencies for avr-c.o.
2010-05-26 Steven Bosscher <steven@gcc.gnu.org>
* explow.c (set_stack_check_libfunc): Adjust to accept name as a * explow.c (set_stack_check_libfunc): Adjust to accept name as a
string instead of SYMBOL_REF rtx. string instead of SYMBOL_REF rtx.
* rtl.h (set_stack_check_libfunc): Move prototype from here... * rtl.h (set_stack_check_libfunc): Move prototype from here...
......
gcc/config/avr/avr-c.c
...@@ -24,10 +24,10 @@ ...@@ -24,10 +24,10 @@
#include "coretypes.h" #include "coretypes.h"
#include "tm.h" #include "tm.h"
#include "tm_p.h" #include "tm_p.h"
#include "regs.h" #include "cpplib.h"
#include "tree.h"
#include "c-common.h" #include "c-common.h"
/* Not included in avr.c since this requires C front end. */ /* Not included in avr.c since this requires C front end. */
/* Worker function for TARGET_CPU_CPP_BUILTINS. */ /* Worker function for TARGET_CPU_CPP_BUILTINS. */
......
gcc/config/avr/avr-devices.c
...@@ -69,21 +69,21 @@ const struct mcu_type_s avr_mcu_types[] = { ...@@ -69,21 +69,21 @@ const struct mcu_type_s avr_mcu_types[] = {
{ "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" }, { "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" },
{ "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" }, { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" },
{ "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" }, { "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" },
{ "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__" 1, 0x0060, "tn24a" }, { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" },
{ "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__" 1, 0x0060, "tn4313" }, { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 1, 0x0060, "tn4313" },
{ "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" }, { "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" },
{ "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__" 0, 0x0060, "tn44a" }, { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" },
{ "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" }, { "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" },
{ "attiny84a", ARCH_AVR25, "__AVR_ATtiny84A__" 0, 0x0060, "tn84" }, { "attiny84a", ARCH_AVR25, "__AVR_ATtiny84A__", 0, 0x0060, "tn84" },
{ "attiny25", ARCH_AVR25, "__AVR_ATtiny25__", 1, 0x0060, "tn25" }, { "attiny25", ARCH_AVR25, "__AVR_ATtiny25__", 1, 0x0060, "tn25" },
{ "attiny45", ARCH_AVR25, "__AVR_ATtiny45__", 0, 0x0060, "tn45" }, { "attiny45", ARCH_AVR25, "__AVR_ATtiny45__", 0, 0x0060, "tn45" },
{ "attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0x0060, "tn85" }, { "attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0x0060, "tn85" },
{ "attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0x0060, "tn261" }, { "attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0x0060, "tn261" },
{ "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__" 1, 0x0060, "tn261a" }, { "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__", 1, 0x0060, "tn261a" },
{ "attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0x0060, "tn461" }, { "attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0x0060, "tn461" },
{ "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__" 0, 0x0060, "tn461a" }, { "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__", 0, 0x0060, "tn461a" },
{ "attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0x0060, "tn861" }, { "attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0x0060, "tn861" },
{ "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__" 0, 0x0060, "tn861a" }, { "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__", 0, 0x0060, "tn861a" },
{ "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__", 0, 0x0060, "tn43u" }, { "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__", 0, 0x0060, "tn43u" },
{ "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" }, { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" },
{ "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" }, { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" },
...@@ -109,12 +109,12 @@ const struct mcu_type_s avr_mcu_types[] = { ...@@ -109,12 +109,12 @@ const struct mcu_type_s avr_mcu_types[] = {
{ "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" }, { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
{ "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" }, { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
{ "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" }, { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
{ "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__" 0, 0x0100, "m48a" }, { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
{ "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" }, { "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
{ "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" }, { "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
{ "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__" 0, 0x0100, "m88a" }, { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
{ "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0x0100, "m88p" }, { "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0x0100, "m88p" },
{ "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__" 0, 0x0100, "m88pa" }, { "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__", 0, 0x0100, "m88pa" },
{ "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__", 0, 0x0060, "m8515" }, { "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__", 0, 0x0060, "m8515" },
{ "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__", 0, 0x0060, "m8535" }, { "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__", 0, 0x0060, "m8535" },
{ "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__", 0, 0x0100, "m8hva" }, { "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__", 0, 0x0100, "m8hva" },
...@@ -127,64 +127,64 @@ const struct mcu_type_s avr_mcu_types[] = { ...@@ -127,64 +127,64 @@ const struct mcu_type_s avr_mcu_types[] = {
/* Enhanced, > 8K, <= 64K. */ /* Enhanced, > 8K, <= 64K. */
{ "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" }, { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
{ "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" }, { "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
{ "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__" 0, 0x0060, "m16a" }, { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
{ "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" }, { "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
{ "atmega162", ARCH_AVR5, "__AVR_ATmega162__", 0, 0x0100, "m162" }, { "atmega162", ARCH_AVR5, "__AVR_ATmega162__", 0, 0x0100, "m162" },
{ "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" }, { "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
{ "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__" 0, 0x0060, "m164a" }, { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0060, "m164a" },
{ "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" }, { "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
{ "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" }, { "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
{ "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__" 0, 0x0100, "m165a" }, { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
{ "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" }, { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
{ "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" }, { "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
{ "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__" 0, 0x0100, "m168a" }, { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
{ "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" }, { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
{ "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" }, { "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
{ "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__" 0, 0x0100, "m169a" }, { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
{ "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" }, { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
{ "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__" 0, 0x0100, "m169pa" }, { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
{ "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" }, { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
{ "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" }, { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
{ "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__" 0, 0x0100, "m324a" }, { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
{ "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" }, { "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
{ "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__" 0, 0x0100, "m324pa" }, { "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__", 0, 0x0100, "m324pa" },
{ "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" }, { "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
{ "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__" 0, 0x0100, "m325a" }, { "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
{ "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" }, { "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
{ "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" }, { "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
{ "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__" 0, 0x0100, "m3250a" }, { "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
{ "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" }, { "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
{ "atmega328", ARCH_AVR5, "__AVR_ATmega328__" 0, 0x0100, "m328" }, { "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
{ "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" }, { "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
{ "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" }, { "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
{ "atmega329a", ARCH_AVR5, "__AVR_ATmega329A__" 0, 0x0100, "m329a" }, { "atmega329a", ARCH_AVR5, "__AVR_ATmega329A__", 0, 0x0100, "m329a" },
{ "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__", 0, 0x0100, "m329p" }, { "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__", 0, 0x0100, "m329p" },
{ "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__" 0, 0x0100, "m329pa" }, { "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__", 0, 0x0100, "m329pa" },
{ "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" }, { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
{ "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__" 0, 0x0100, "m3290a" }, { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
{ "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" }, { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
{ "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" }, { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
{ "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" }, { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
{ "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" }, { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
{ "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" }, { "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
{ "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__" 0, 0x0100, "m644a" }, { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
{ "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__", 0, 0x0100, "m644p" }, { "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__", 0, 0x0100, "m644p" },
{ "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__" 0, 0x0100, "m644pa" }, { "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__", 0, 0x0100, "m644pa" },
{ "atmega645", ARCH_AVR5, "__AVR_ATmega645__", 0, 0x0100, "m645" }, { "atmega645", ARCH_AVR5, "__AVR_ATmega645__", 0, 0x0100, "m645" },
{ "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__" 0, 0x0100, "m645a" }, { "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__", 0, 0x0100, "m645a" },
{ "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__" 0, 0x0100, "m645p" }, { "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__", 0, 0x0100, "m645p" },
{ "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__", 0, 0x0100, "m6450" }, { "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__", 0, 0x0100, "m6450" },
{ "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__" 0, 0x0100, "m6450a" }, { "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__", 0, 0x0100, "m6450a" },
{ "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__" 0, 0x0100, "m6450p" }, { "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__", 0, 0x0100, "m6450p" },
{ "atmega649", ARCH_AVR5, "__AVR_ATmega649__", 0, 0x0100, "m649" }, { "atmega649", ARCH_AVR5, "__AVR_ATmega649__", 0, 0x0100, "m649" },
{ "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__" 0, 0x0100, "m649a" }, { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
{ "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__" 0, 0x0100, "m649p" }, { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
{ "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" }, { "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
{ "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" }, { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
{ "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__" 0, 0x0100, "m16hva2" }, { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
{ "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" }, { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
{ "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" }, { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
{ "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__" 0, 0x0100, "m64hve" }, { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
{ "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" }, { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
{ "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" }, { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
{ "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" }, { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
......
gcc/config/avr/t-avr
...@@ -27,7 +27,7 @@ avr-devices.o: $(srcdir)/config/avr/avr-devices.c \ ...@@ -27,7 +27,7 @@ avr-devices.o: $(srcdir)/config/avr/avr-devices.c \
avr-c.o: $(srcdir)/config/avr/avr-c.c \ avr-c.o: $(srcdir)/config/avr/avr-c.c \
$(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(C_COMMON_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
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