Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
e5e28962
Commit
e5e28962
authored
Apr 03, 1993
by
Jeff Law
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
* pa.c (hppa_legitimize_address): Use Pmode consistently.
From-SVN: r3995
parent
2c9ce2ef
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
14 additions
and
14 deletions
+14
-14
gcc/config/pa/pa.c
+14
-14
No files found.
gcc/config/pa/pa.c
View file @
e5e28962
...
...
@@ -644,27 +644,27 @@ hppa_legitimize_address (x, oldx, mode)
&&
GET_CODE
(
XEXP
(
x
,
0
))
==
SYMBOL_REF
)
{
rtx
const_part
=
gen_rtx
(
CONST
,
VOIDmode
,
gen_rtx
(
PLUS
,
SI
mode
,
gen_rtx
(
PLUS
,
P
mode
,
XEXP
(
x
,
0
),
GEN_INT
(
newoffset
)));
rtx
tmp_reg
=
force_reg
(
SI
mode
,
gen_rtx
(
HIGH
,
SI
mode
,
const_part
));
=
force_reg
(
P
mode
,
gen_rtx
(
HIGH
,
P
mode
,
const_part
));
ptr_reg
=
force_reg
(
SI
mode
,
gen_rtx
(
LO_SUM
,
SI
mode
,
=
force_reg
(
P
mode
,
gen_rtx
(
LO_SUM
,
P
mode
,
tmp_reg
,
const_part
));
}
else
{
if
(
!
VAL_14_BITS_P
(
newoffset
))
int_part
=
force_reg
(
SI
mode
,
GEN_INT
(
newoffset
));
int_part
=
force_reg
(
P
mode
,
GEN_INT
(
newoffset
));
else
int_part
=
GEN_INT
(
newoffset
);
ptr_reg
=
force_reg
(
SI
mode
,
gen_rtx
(
PLUS
,
SI
mode
,
force_reg
(
SI
mode
,
XEXP
(
x
,
0
)),
ptr_reg
=
force_reg
(
P
mode
,
gen_rtx
(
PLUS
,
P
mode
,
force_reg
(
P
mode
,
XEXP
(
x
,
0
)),
int_part
));
}
return
plus_constant
(
ptr_reg
,
offset
-
newoffset
);
...
...
@@ -675,12 +675,12 @@ hppa_legitimize_address (x, oldx, mode)
{
int
val
=
INTVAL
(
XEXP
(
XEXP
(
x
,
0
),
1
));
rtx
reg1
,
reg2
;
reg1
=
force_reg
(
SI
mode
,
force_operand
(
XEXP
(
x
,
1
),
0
));
reg2
=
force_reg
(
SI
mode
,
reg1
=
force_reg
(
P
mode
,
force_operand
(
XEXP
(
x
,
1
),
0
));
reg2
=
force_reg
(
P
mode
,
force_operand
(
XEXP
(
XEXP
(
x
,
0
),
0
),
0
));
return
force_reg
(
SI
mode
,
gen_rtx
(
PLUS
,
SI
mode
,
gen_rtx
(
MULT
,
SI
mode
,
reg2
,
return
force_reg
(
P
mode
,
gen_rtx
(
PLUS
,
P
mode
,
gen_rtx
(
MULT
,
P
mode
,
reg2
,
GEN_INT
(
val
)),
reg1
));
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment