Skip to content

R
riscv-gcc-1
Commit e2d0915c by Alan Modra Committed by Alan Modra
Options

rs6000.md (movdf_softfloat64): Allow dummy ctr,ctr moves. 

	* config/rs6000/rs6000.md (movdf_softfloat64): Allow dummy ctr,ctr
	moves.

From-SVN: r73022
parent 0fda236e
Showing with 11 additions and 5 deletions
gcc/ChangeLog
2003-10-29 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md (movdf_softfloat64): Allow dummy ctr,ctr
moves.
2003-10-28 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> 2003-10-28 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
PR target/11598 PR target/11598
......
gcc/config/rs6000/rs6000.md
...@@ -8181,8 +8181,8 @@ ...@@ -8181,8 +8181,8 @@
(set_attr "length" "4,4,4,4,4,4,4,4,8,12,16")]) (set_attr "length" "4,4,4,4,4,4,4,4,8,12,16")])
(define_insn "*movdf_softfloat64" (define_insn "*movdf_softfloat64"
[(set (match_operand:DF 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r") [(set (match_operand:DF 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,*h")
(match_operand:DF 1 "input_operand" "r,r,h,m,r,G,H,F"))] (match_operand:DF 1 "input_operand" "r,r,h,m,r,G,H,F,0"))]
"TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS) "TARGET_POWERPC64 && (TARGET_SOFT_FLOAT || !TARGET_FPRS)
&& (gpc_reg_operand (operands[0], DFmode) && (gpc_reg_operand (operands[0], DFmode)
|| gpc_reg_operand (operands[1], DFmode))" || gpc_reg_operand (operands[1], DFmode))"
...@@ -8194,9 +8194,10 @@ ...@@ -8194,9 +8194,10 @@
std%U0%X0 %1,%0 std%U0%X0 %1,%0
# #
# #
#" #
[(set_attr "type" "*,*,*,load,store,*,*,*") nop"
(set_attr "length" "4,4,4,4,4,8,12,16")]) [(set_attr "type" "*,*,*,load,store,*,*,*,*")
(set_attr "length" "4,4,4,4,4,8,12,16,4")])
(define_expand "movtf" (define_expand "movtf"
[(set (match_operand:TF 0 "general_operand" "") [(set (match_operand:TF 0 "general_operand" "")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment