From e1565e6588aaf9e7062ff462cb22840f4e66b8c7 Mon Sep 17 00:00:00 2001
From: David Edelsohn <edelsohn@gnu.org>
Date: Tue, 4 Jan 2000 20:09:19 +0000
Subject: [PATCH] expmed.c (SLOW_UNALIGNED_ACCESS): Add mode and align parameters to default definition.
* expmed.c (SLOW_UNALIGNED_ACCESS): Add mode and align parameters
to default definition.
(store_bit_field): Call SLOW_UNALIGNED_ACCESS with mode and alignment.
(store_fixed_bit_field): Call macro with word_mode and alignment.
(extract_bit_field): Call macro with relevant mode and alignment.
* expr.c (SLOW_UNALIGNED_ACCESS): Add mode and align parameters
to default definition.
(move_by_pieces): Call SLOW_UNALIGNED_ACCESS with word_mode
and alignment.
(move_by_pieces_ninsns): Likewise.
(clear_by_pieces): Likewise.
(emit_push_insn): Likewise.
(store_field): Call macro with relevant mode and alignment.
(expand_expr): Likewise.
(expand_expr_unaligned): Likewise.
* rs6000.h (HANDLE_PRAGMA_PACK): Define.
(SLOW_UNALIGNED_ACCESS): Define.
(CASE_VECTOR_MODE): Always use 32-bit offsets.
(ASM_FILE_END): Generate 64-bit symbol in 64-bit mode.
(EXTRA_SECTOIN_FUNCTIONS): Indent .csect pseudo-op.
(toc_section): Likewise and .toc pseudo-op.
(ASM_DECLARE_FUNCTION): Likewise. Align text more strictly in
64-bit mode.
(TEXT_SECTION_ASM_OP): Likewise.
(ASM_OUTPUT_ADD_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Always use
32-bit offsets.
* a29k.h (SLOW_UNALIGNED_ACCESS): Add MODE and ALIGN parameters.
* alpha.h (SLOW_UNALIGNED_ACCESS): Likewise.
* arm/thumb.h (SLOW_UNALIGNED_ACCESS): Likewise.
* gmicro.h (SLOW_UNALIGNED_ACCESS): Likewise.
* fr30.h (SLOW_UNALIGNED_ACCESS): Likewise.
From-SVN: r31211
---
gcc/ChangeLog | 36 ++++++++++++++++++++++++++++++++++++
gcc/config/a29k/a29k.h | 4 ++--
gcc/config/alpha/alpha.h | 4 ++--
gcc/config/arm/thumb.h | 4 ++--
gcc/config/dsp16xx/dsp16xx.h | 4 ++--
gcc/config/fr30/fr30.h | 4 ++--
gcc/config/gmicro/gmicro.h | 4 ++--
gcc/config/i386/i386.h | 2 +-
gcc/config/rs6000/rs6000.h | 61 +++++++++++++++++++++++++++++++++++++------------------------
gcc/expmed.c | 17 ++++++++++-------
gcc/expr.c | 21 +++++++++++----------
11 files changed, 107 insertions(+), 54 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6050f79..606af6e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,39 @@
+2000-01-04 David Edelsohn <edelsohn@gnu.org>
+
+ * expmed.c (SLOW_UNALIGNED_ACCESS): Add mode and align parameters
+ to default definition.
+ (store_bit_field): Call SLOW_UNALIGNED_ACCESS with mode and alignment.
+ (store_fixed_bit_field): Call macro with word_mode and alignment.
+ (extract_bit_field): Call macro with relevant mode and alignment.
+ * expr.c (SLOW_UNALIGNED_ACCESS): Add mode and align parameters
+ to default definition.
+ (move_by_pieces): Call SLOW_UNALIGNED_ACCESS with word_mode
+ and alignment.
+ (move_by_pieces_ninsns): Likewise.
+ (clear_by_pieces): Likewise.
+ (emit_push_insn): Likewise.
+ (store_field): Call macro with relevant mode and alignment.
+ (expand_expr): Likewise.
+ (expand_expr_unaligned): Likewise.
+
+ * rs6000.h (HANDLE_PRAGMA_PACK): Define.
+ (SLOW_UNALIGNED_ACCESS): Define.
+ (CASE_VECTOR_MODE): Always use 32-bit offsets.
+ (ASM_FILE_END): Generate 64-bit symbol in 64-bit mode.
+ (EXTRA_SECTOIN_FUNCTIONS): Indent .csect pseudo-op.
+ (toc_section): Likewise and .toc pseudo-op.
+ (ASM_DECLARE_FUNCTION): Likewise. Align text more strictly in
+ 64-bit mode.
+ (TEXT_SECTION_ASM_OP): Likewise.
+ (ASM_OUTPUT_ADD_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Always use
+ 32-bit offsets.
+
+ * a29k.h (SLOW_UNALIGNED_ACCESS): Add MODE and ALIGN parameters.
+ * alpha.h (SLOW_UNALIGNED_ACCESS): Likewise.
+ * arm/thumb.h (SLOW_UNALIGNED_ACCESS): Likewise.
+ * gmicro.h (SLOW_UNALIGNED_ACCESS): Likewise.
+ * fr30.h (SLOW_UNALIGNED_ACCESS): Likewise.
+
Tue Jan 4 11:44:13 2000 Jeffrey A Law (law@cygnus.com)
* regclass.c: Revert my Jan 4 change to loop cost computation.
diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h
index 03e2c62..3df5d32 100644
--- a/gcc/config/a29k/a29k.h
+++ b/gcc/config/a29k/a29k.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for AMD Am29000 CPU.
- Copyright (C) 1988, 90-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1988, 90-98, 2000 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@nyu.edu)
This file is part of GNU CC.
@@ -219,7 +219,7 @@ extern int target_flags;
/* Set this non-zero if unaligned move instructions are extremely slow.
On the 29k, they trap. */
-#define SLOW_UNALIGNED_ACCESS 1
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
/* Standard register usage. */
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 4e5af7b..09f8974 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for DEC Alpha.
- Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1992, 93-99, 2000 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
@@ -537,7 +537,7 @@ extern const char *alpha_mlat_string; /* For -mmemory-latency= */
On the Alpha, they trap. */
-#define SLOW_UNALIGNED_ACCESS 1
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
/* Standard register usage. */
diff --git a/gcc/config/arm/thumb.h b/gcc/config/arm/thumb.h
index 09f5448..d9d4ce0 100644
--- a/gcc/config/arm/thumb.h
+++ b/gcc/config/arm/thumb.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for ARM/Thumb.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
The basis of this contribution was generated by
Richard Earnshaw, Advanced RISC Machines Ltd
@@ -1082,7 +1082,7 @@ extern struct rtx_def * legitimize_pic_address ();
#define SLOW_BYTE_ACCESS 0
-#define SLOW_UNALIGNED_ACCESS 1
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
#define NO_FUNCTION_CSE 1
diff --git a/gcc/config/dsp16xx/dsp16xx.h b/gcc/config/dsp16xx/dsp16xx.h
index 5d96207..625deaf 100644
--- a/gcc/config/dsp16xx/dsp16xx.h
+++ b/gcc/config/dsp16xx/dsp16xx.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. AT&T DSP1600.
- Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1994, 95-98, 2000 Free Software Foundation, Inc.
Contributed by Michael Collison (collison@world.std.com).
This file is part of GNU CC.
@@ -1571,7 +1571,7 @@ extern struct dsp16xx_frame_info current_frame_info;
/* Define this macro if unaligned accesses have a cost many times greater than
aligned accesses, for example if they are emulated in a trap handler */
-/* define SLOW_UNALIGNED_ACCESS */
+/* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
/* Define this macro to inhibit strength reduction of memory addresses */
/* #define DONT_REDUCE_ADDR */
diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h
index 1bdd0d6..dfe33ef 100644
--- a/gcc/config/fr30/fr30.h
+++ b/gcc/config/fr30/fr30.h
@@ -1,7 +1,7 @@
/*{{{ Comment */
/* Definitions of FR30 target.
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This file is part of GNU CC.
@@ -2608,7 +2608,7 @@ do \
a memory access.
If the value of this macro is always zero, it need not be defined. */
-/* #define SLOW_UNALIGNED_ACCESS */
+/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
/* Define this macro to inhibit strength reduction of memory addresses. (On
some machines, such strength reduction seems to do harm rather than good.) */
diff --git a/gcc/config/gmicro/gmicro.h b/gcc/config/gmicro/gmicro.h
index fdfc2eb..2a6236a 100644
--- a/gcc/config/gmicro/gmicro.h
+++ b/gcc/config/gmicro/gmicro.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Gmicro (TRON) version.
- Copyright (C) 1987, 88, 89, 95-98, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 89, 95-99, 2000 Free Software Foundation, Inc.
Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD.
(yuhara@flab.fujitsu.co.jp)
@@ -168,7 +168,7 @@ extern int target_flags;
Unaligned data is allowed on Gmicro, though the access is slow. */
#define STRICT_ALIGNMENT 1
-#define SLOW_UNALIGNED_ACCESS 1
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
/* Make strings word-aligned so strcpy from constants will be faster. */
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 7d5fd29..2bde60e 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2079,7 +2079,7 @@ while (0)
If the value of this macro is always zero, it need not be defined. */
-/* #define SLOW_UNALIGNED_ACCESS 0 */
+/* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */
/* Define this macro to inhibit strength reduction of memory
addresses. (On some machines, such strength reduction seems to do
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index f3f3f2e..d36bfc2 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for IBM RS/6000.
- Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1992, 93-99, 2000 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
@@ -508,7 +508,6 @@ extern int rs6000_debug_arg; /* debug argument handling */
/* Define this to change the optimizations performed by default. */
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
-
/* Show we can debug even without a frame pointer. */
#define CAN_DEBUG_WITHOUT_FP
@@ -636,6 +635,9 @@ extern int rs6000_debug_arg; /* debug argument handling */
/* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 64
+/* Handle #pragma pack. */
+#define HANDLE_PRAGMA_PACK 1
+
/* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
(TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \
@@ -677,6 +679,14 @@ extern int rs6000_debug_arg; /* debug argument handling */
/* Non-zero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 0
+
+/* Define this macro to be the value 1 if unaligned accesses have a cost
+ many times greater than aligned accesses, for example if they are
+ emulated in a trap handler. */
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \
+ ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode) \
+ && (ALIGN) < 4) ? 1 : 0)
+
/* Standard register usage. */
@@ -861,8 +871,8 @@ extern int rs6000_debug_arg; /* debug argument handling */
On the RS/6000, bump this up a bit. */
-#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
- ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
+#define MEMORY_MOVE_COST(MODE, CLASS, IN) \
+ ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
&& (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \
? 3 : 2) \
+ 4)
@@ -882,7 +892,7 @@ extern int rs6000_debug_arg; /* debug argument handling */
output-dependencies. In fact, output dependencies on the CR do have
a cost, but it is probably not worthwhile to track it. */
-#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
+#define ADJUST_COST(INSN, LINK, DEP_INSN, COST) \
(COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST)
/* A C statement (sans semicolon) to update the integer scheduling priority
@@ -2176,7 +2186,7 @@ do { \
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
-#define CASE_VECTOR_MODE (TARGET_32BIT ? SImode : DImode)
+#define CASE_VECTOR_MODE SImode
/* Define as C expression which evaluates to nonzero if the tablejump
instruction expects the table to contain offsets from the address of the
@@ -2524,7 +2534,8 @@ extern int rs6000_trunc_used;
text_section (); \
fputs ("_section_.text:\n", FILE); \
data_section (); \
- fputs ("\t.long _section_.text\n", FILE); \
+ fputs (TARGET_32BIT \
+ ? "\t.long _section_.text\n" : "\t.llong _section_.text\n", FILE); \
}
/* We define this to prevent the name mangler from putting dollar signs into
@@ -2567,10 +2578,10 @@ extern int rs6000_trunc_used;
that we can branch to this function without emitting a no-op after the
call. Do not set this flag if the function is weakly defined. */
-#define ENCODE_SECTION_INFO(DECL) \
+#define ENCODE_SECTION_INFO(DECL) \
if (TREE_CODE (DECL) == FUNCTION_DECL \
&& (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL)) \
- && !DECL_WEAK (DECL)) \
+ && ! DECL_WEAK (DECL)) \
SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
/* Indicate that jump tables go in the text section. */
@@ -2587,7 +2598,7 @@ read_only_data_section () \
{ \
if (in_section != read_only_data) \
{ \
- fprintf (asm_out_file, ".csect %s[RO],3\n", \
+ fprintf (asm_out_file, "\t.csect %s[RO],3\n", \
xcoff_read_only_section_name); \
in_section = read_only_data; \
} \
@@ -2598,7 +2609,7 @@ private_data_section () \
{ \
if (in_section != private_data) \
{ \
- fprintf (asm_out_file, ".csect %s[RW],3\n", \
+ fprintf (asm_out_file, "\t.csect %s[RW],3\n", \
xcoff_private_data_section_name); \
in_section = private_data; \
} \
@@ -2609,7 +2620,7 @@ read_only_private_data_section () \
{ \
if (in_section != read_only_private_data) \
{ \
- fprintf (asm_out_file, ".csect %s[RO],3\n", \
+ fprintf (asm_out_file, "\t.csect %s[RO],3\n", \
xcoff_private_data_section_name); \
in_section = read_only_private_data; \
} \
@@ -2625,19 +2636,19 @@ toc_section () \
in each file. */ \
if (! toc_initialized) \
{ \
- fputs (".toc\nLCTOC..0:\n", asm_out_file); \
+ fputs ("\t.toc\nLCTOC..0:\n", asm_out_file); \
fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \
toc_initialized = 1; \
} \
\
if (in_section != toc) \
- fprintf (asm_out_file, ".csect toc_table[RW]%s\n", \
+ fprintf (asm_out_file, "\t.csect toc_table[RW]%s\n", \
(TARGET_32BIT ? "" : ",3")); \
} \
else \
{ \
if (in_section != toc) \
- fputs (".toc\n", asm_out_file); \
+ fputs ("\t.toc\n", asm_out_file); \
} \
in_section = toc; \
}
@@ -2651,9 +2662,10 @@ extern int toc_initialized;
The csect for the function will have already been created by the
`text_section' call previously done. We do have to go back to that
- csect, however. */
+ csect, however.
-/* ??? What do the 16 and 044 in the .function line really mean? */
+ The third and fourth parameters to the .function pseudo-op (16 and 044)
+ are placeholders which no longer have any use. */
#define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
{ if (TREE_PUBLIC (DECL)) \
@@ -2668,7 +2680,7 @@ extern int toc_initialized;
RS6000_OUTPUT_BASENAME (FILE, NAME); \
putc ('\n', FILE); \
} \
- fputs (".csect ", FILE); \
+ fputs ("\t.csect ", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (TARGET_32BIT ? "[DS]\n" : "[DS],3\n", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
@@ -2676,7 +2688,8 @@ extern int toc_initialized;
fputs (TARGET_32BIT ? "\t.long ." : "\t.llong .", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (", TOC[tc0], 0\n", FILE); \
- fputs (".csect .text[PR]\n.", FILE); \
+ fputs (TARGET_32BIT \
+ ? "\t.csect .text[PR]\n." : "\t.csect .text[PR],3\n.", FILE); \
RS6000_OUTPUT_BASENAME (FILE, NAME); \
fputs (":\n", FILE); \
if (write_symbols == XCOFF_DEBUG) \
@@ -2855,7 +2868,7 @@ do { \
Text section for 64-bit target may contain 64-bit address jump table. */
#define TEXT_SECTION_ASM_OP (TARGET_32BIT \
- ? ".csect .text[PR]" : ".csect .text[PR],3")
+ ? "\t.csect .text[PR]" : "\t.csect .text[PR],3")
/* Output before writable data.
Align entire section to BIGGEST_ALIGNMENT. */
@@ -3120,7 +3133,7 @@ do { \
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
do { char buf[100]; \
- fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \
+ fputs ("\t.long ", FILE); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
assemble_name (FILE, buf); \
putc ('\n', FILE); \
@@ -3128,9 +3141,9 @@ do { \
/* This is how to output an element of a case-vector that is relative. */
-#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
do { char buf[100]; \
- fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \
+ fputs ("\t.long ", FILE); \
ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
assemble_name (FILE, buf); \
putc ('-', FILE); \
@@ -3323,7 +3336,7 @@ extern struct rtx_def *function_arg ();
extern int function_arg_partial_nregs ();
extern int function_arg_pass_by_reference ();
extern void setup_incoming_varargs ();
-extern union tree_node *rs6000_va_list ();
+extern union tree_node *rs6000_build_va_list ();
extern void rs6000_va_start ();
extern struct rtx_def *rs6000_va_arg ();
extern struct rtx_def *rs6000_stack_temp ();
diff --git a/gcc/expmed.c b/gcc/expmed.c
index e558cb0..2897d77 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -54,7 +54,7 @@ static void do_cmp_and_jump PROTO((rtx, rtx, enum rtx_code,
static int sdiv_pow2_cheap, smod_pow2_cheap;
#ifndef SLOW_UNALIGNED_ACCESS
-#define SLOW_UNALIGNED_ACCESS STRICT_ALIGNMENT
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
#endif
/* For compilers that support multiple targets with different word sizes,
@@ -295,7 +295,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
BITPOS is 0 in a REG bigger than a word. */
if (GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD
&& (GET_CODE (op0) != MEM
- || ! SLOW_UNALIGNED_ACCESS
+ || ! SLOW_UNALIGNED_ACCESS (fieldmode, align)
|| (offset * BITS_PER_UNIT % bitsize == 0
&& align % GET_MODE_SIZE (fieldmode) == 0))
&& bitpos == 0 && bitsize == GET_MODE_BITSIZE (fieldmode))
@@ -509,7 +509,8 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
bestmode = GET_MODE (op0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS && GET_MODE_SIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, align)
+ && GET_MODE_SIZE (bestmode) > align))
goto insv_loses;
/* Adjust address to point to the containing unit of that mode. */
@@ -632,7 +633,7 @@ store_fixed_bit_field (op0, offset, bitsize, bitpos, value, struct_align)
int all_zero = 0;
int all_one = 0;
- if (! SLOW_UNALIGNED_ACCESS)
+ if (! SLOW_UNALIGNED_ACCESS (word_mode, struct_align))
struct_align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
/* There is a case not handled here:
@@ -1052,7 +1053,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (GET_MODE (op0))))
|| (GET_CODE (op0) == MEM
- && (! SLOW_UNALIGNED_ACCESS
+ && (! SLOW_UNALIGNED_ACCESS (mode, align)
|| (offset * BITS_PER_UNIT % bitsize == 0
&& align * BITS_PER_UNIT % bitsize == 0))))
&& ((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
@@ -1253,7 +1254,8 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
bestmode = GET_MODE (xop0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS && GET_MODE_SIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, align)
+ && GET_MODE_SIZE (bestmode) > align))
goto extzv_loses;
/* Compute offset as multiple of this unit,
@@ -1390,7 +1392,8 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
bestmode = GET_MODE (xop0);
if (bestmode == VOIDmode
- || (SLOW_UNALIGNED_ACCESS && GET_MODE_SIZE (bestmode) > align))
+ || (SLOW_UNALIGNED_ACCESS (bestmode, align)
+ && GET_MODE_SIZE (bestmode) > align))
goto extv_loses;
/* Compute offset as multiple of this unit,
diff --git a/gcc/expr.c b/gcc/expr.c
index b492c68..54a9097 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -198,7 +198,7 @@ enum insn_code clrstr_optab[NUM_MACHINE_MODES];
/* SLOW_UNALIGNED_ACCESS is non-zero if unaligned accesses are very slow. */
#ifndef SLOW_UNALIGNED_ACCESS
-#define SLOW_UNALIGNED_ACCESS STRICT_ALIGNMENT
+#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
#endif
/* This is run once per compilation to set up which modes can be used
@@ -1435,7 +1435,7 @@ move_by_pieces (to, from, len, align)
data.to_addr = copy_addr_to_reg (to_addr);
}
- if (! SLOW_UNALIGNED_ACCESS
+ if (! SLOW_UNALIGNED_ACCESS (word_mode, align)
|| align > MOVE_MAX || align >= BIGGEST_ALIGNMENT / BITS_PER_UNIT)
align = MOVE_MAX;
@@ -1477,7 +1477,7 @@ move_by_pieces_ninsns (l, align)
register int n_insns = 0;
int max_size = MOVE_MAX + 1;
- if (! SLOW_UNALIGNED_ACCESS
+ if (! SLOW_UNALIGNED_ACCESS (word_mode, align)
|| align > MOVE_MAX || align >= BIGGEST_ALIGNMENT / BITS_PER_UNIT)
align = MOVE_MAX;
@@ -2283,7 +2283,7 @@ clear_by_pieces (to, len, align)
data.to_addr = copy_addr_to_reg (to_addr);
}
- if (! SLOW_UNALIGNED_ACCESS
+ if (! SLOW_UNALIGNED_ACCESS (word_mode, align)
|| align > MOVE_MAX || align >= BIGGEST_ALIGNMENT / BITS_PER_UNIT)
align = MOVE_MAX;
@@ -2972,7 +2972,7 @@ emit_push_insn (x, mode, type, size, align, partial, reg, extra,
/* Here we avoid the case of a structure whose weak alignment
forces many pushes of a small amount of data,
and such small pushes do rounding that causes trouble. */
- && ((! SLOW_UNALIGNED_ACCESS)
+ && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
|| align >= BIGGEST_ALIGNMENT / BITS_PER_UNIT
|| PUSH_ROUNDING (align) == align)
&& PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
@@ -4770,10 +4770,10 @@ store_field (target, bitsize, bitpos, mode, exp, value_mode,
|| GET_CODE (target) == SUBREG
/* If the field isn't aligned enough to store as an ordinary memref,
store it as a bit field. */
- || (mode != BLKmode && SLOW_UNALIGNED_ACCESS
+ || (mode != BLKmode && SLOW_UNALIGNED_ACCESS (mode, align)
&& (align * BITS_PER_UNIT < GET_MODE_ALIGNMENT (mode)
|| bitpos % GET_MODE_ALIGNMENT (mode)))
- || (mode == BLKmode && SLOW_UNALIGNED_ACCESS
+ || (mode == BLKmode && SLOW_UNALIGNED_ACCESS (mode, align)
&& (TYPE_ALIGN (TREE_TYPE (exp)) > align * BITS_PER_UNIT
|| bitpos % TYPE_ALIGN (TREE_TYPE (exp)) != 0))
/* If the RHS and field are a constant size and the size of the
@@ -6749,14 +6749,15 @@ expand_expr (exp, target, tmode, modifier)
&& GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
/* If the field isn't aligned enough to fetch as a memref,
fetch it as a bit field. */
- || (mode1 != BLKmode && SLOW_UNALIGNED_ACCESS
+ || (mode1 != BLKmode
+ && SLOW_UNALIGNED_ACCESS (mode1, alignment)
&& ((TYPE_ALIGN (TREE_TYPE (tem))
< (unsigned int) GET_MODE_ALIGNMENT (mode))
|| (bitpos % GET_MODE_ALIGNMENT (mode) != 0)))))
|| (modifier != EXPAND_CONST_ADDRESS
&& modifier != EXPAND_INITIALIZER
&& mode == BLKmode
- && SLOW_UNALIGNED_ACCESS
+ && SLOW_UNALIGNED_ACCESS (mode, alignment)
&& (TYPE_ALIGN (type) > alignment * BITS_PER_UNIT
|| bitpos % TYPE_ALIGN (type) != 0)))
{
@@ -8689,7 +8690,7 @@ expand_expr_unaligned (exp, palign)
EXPAND_INITIALIZER), then we must not copy to a temporary. */
if (mode1 == VOIDmode
|| GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG
- || (SLOW_UNALIGNED_ACCESS
+ || (SLOW_UNALIGNED_ACCESS (mode1, alignment)
&& (TYPE_ALIGN (type) > alignment * BITS_PER_UNIT
|| bitpos % TYPE_ALIGN (type) != 0)))
{
--
libgit2 0.26.0