Commit e0b92319 by Nick Clifton Committed by Nick Clifton

arm.c: Remove extraneous whitespace.

* config/arm/arm.c: Remove extraneous whitespace.  Remove comment describing
  the deleted arm_gen_rotated_half_load function.

From-SVN: r105169
parent a5f5c6be
2005-10-10 Nick Clifton <nickc@redhat.com>
* config/arm/arm.c: Remove extraneous whitespace. Remove comment
describing the deleted arm_gen_rotated_half_load function.
2005-10-09 Kaz Kojima <kkojima@gcc.gnu.org> 2005-10-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (emit_fpu_switch): Set TREE_PUBLIC for * config/sh/sh.c (emit_fpu_switch): Set TREE_PUBLIC for
......
...@@ -3866,7 +3866,7 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) ...@@ -3866,7 +3866,7 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
} }
rtx rtx
thumb_legitimize_reload_address(rtx *x_p, thumb_legitimize_reload_address (rtx *x_p,
enum machine_mode mode, enum machine_mode mode,
int opnum, int type, int opnum, int type,
int ind_levels ATTRIBUTE_UNUSED) int ind_levels ATTRIBUTE_UNUSED)
...@@ -3908,8 +3908,6 @@ thumb_legitimize_reload_address(rtx *x_p, ...@@ -3908,8 +3908,6 @@ thumb_legitimize_reload_address(rtx *x_p,
return NULL; return NULL;
} }
#define REG_OR_SUBREG_REG(X) \ #define REG_OR_SUBREG_REG(X) \
(GET_CODE (X) == REG \ (GET_CODE (X) == REG \
|| (GET_CODE (X) == SUBREG && GET_CODE (SUBREG_REG (X)) == REG)) || (GET_CODE (X) == SUBREG && GET_CODE (SUBREG_REG (X)) == REG))
...@@ -6114,10 +6112,6 @@ arm_gen_movmemqi (rtx *operands) ...@@ -6114,10 +6112,6 @@ arm_gen_movmemqi (rtx *operands)
return 1; return 1;
} }
/* Generate a memory reference for a half word, such that it will be loaded
into the top 16 bits of the word. We can assume that the address is
known to be alignable and of the form reg, or plus (reg, const). */
/* Select a dominance comparison mode if possible for a test of the general /* Select a dominance comparison mode if possible for a test of the general
form (OP (COND_OR (X) (Y)) (const_int 0)). We support three forms. form (OP (COND_OR (X) (Y)) (const_int 0)). We support three forms.
COND_OR == DOM_CC_X_AND_Y => (X && Y) COND_OR == DOM_CC_X_AND_Y => (X && Y)
...@@ -6750,7 +6744,6 @@ arm_pad_reg_upward (enum machine_mode mode ATTRIBUTE_UNUSED, ...@@ -6750,7 +6744,6 @@ arm_pad_reg_upward (enum machine_mode mode ATTRIBUTE_UNUSED,
} }
/* Print a symbolic form of X to the debug file, F. */ /* Print a symbolic form of X to the debug file, F. */
static void static void
arm_print_value (FILE *f, rtx x) arm_print_value (FILE *f, rtx x)
...@@ -8431,7 +8424,6 @@ output_move_double (rtx *operands) ...@@ -8431,7 +8424,6 @@ output_move_double (rtx *operands)
avoid a conflict. */ avoid a conflict. */
otherops[1] = XEXP (XEXP (operands[1], 0), 1); otherops[1] = XEXP (XEXP (operands[1], 0), 1);
otherops[2] = XEXP (XEXP (operands[1], 0), 0); otherops[2] = XEXP (XEXP (operands[1], 0), 0);
} }
/* If both registers conflict, it will usually /* If both registers conflict, it will usually
have been fixed by a splitter. */ have been fixed by a splitter. */
...@@ -13756,7 +13748,6 @@ thumb_load_double_from_address (rtx *operands) ...@@ -13756,7 +13748,6 @@ thumb_load_double_from_address (rtx *operands)
/* Compute <address> + 4 for the high order load. */ /* Compute <address> + 4 for the high order load. */
operands[2] = adjust_address (operands[1], SImode, 4); operands[2] = adjust_address (operands[1], SImode, 4);
/* If the computed address is held in the low order register /* If the computed address is held in the low order register
then load the high order register first, otherwise always then load the high order register first, otherwise always
load the low order register first. */ load the low order register first. */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment