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riscv-gcc-1
Commit dff2abcb by Richard Earnshaw Committed by Richard Earnshaw
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[arm] Put CPU's FPU capabilities directly in the ISA specification 

As part of the transition from the original support for named FPUs to
general FPU properties I defined an entry in the CPU definitions in
arm-cpus.in to use a named FPU.  However, that has now outlived its
usefulness and increasingly we are likely to find that newer cores do
not fit the legacy FPU names very well.  Furthermore it is now possible
to encode all the FPU capatilities directly in the ISA definitions, often
as simply as using +fp or +simd.

So this patch removes the fpu field from the "define cpu" entries and
instead encodes the same information in the isa field.  This also alows us
to remove a bit of now-dead code from parsecpu.awk.

	* config/arm/arm-cpus.in: Move information from fpu field of each
	cpu definition to the isa field.
	* config/arm/parsecpu.awk (fpu): Delete match rule.
	(gen_comm_data): Don't add bits from the CPU's FPU entry.

From-SVN: r262556
parent 305130b9
Showing with 55 additions and 107 deletions
gcc/ChangeLog
2018-07-11 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm-cpus.in: Move information from fpu field of each
cpu definition to the isa field.
* config/arm/parsecpu.awk (fpu): Delete match rule.
(gen_comm_data): Don't add bits from the CPU's FPU entry.
2018-07-11 Richard Biener <rguenther@suse.de> 2018-07-11 Richard Biener <rguenther@suse.de>
PR debug/86457 PR debug/86457
......
gcc/config/arm/arm-cpus.in
...@@ -620,7 +620,6 @@ end arch iwmmxt2 ...@@ -620,7 +620,6 @@ end arch iwmmxt2
# [tune for <cpu-name>] # [tune for <cpu-name>]
# [tune flags <list>] # [tune flags <list>]
# architecture <name> # architecture <name>
# [fpu <name>]
# [isa <additional-isa-flags-list>] # [isa <additional-isa-flags-list>]
# [option <name> add|remove <isa-list>]* # [option <name> add|remove <isa-list>]*
# [optalias <name> <optname>]* # [optalias <name> <optname>]*
...@@ -633,7 +632,7 @@ end arch iwmmxt2 ...@@ -633,7 +632,7 @@ end arch iwmmxt2
# isa flags are appended to those defined by the architecture. # isa flags are appended to those defined by the architecture.
# Each add option must have a distinct feature set and each remove # Each add option must have a distinct feature set and each remove
# option must similarly have a distinct feature set. Option aliases can be # option must similarly have a distinct feature set. Option aliases can be
# added with the optalias statement # added with the optalias statement.
# V4 Architecture Processors # V4 Architecture Processors
begin cpu arm8 begin cpu arm8
...@@ -778,8 +777,7 @@ end cpu arm1020t ...@@ -778,8 +777,7 @@ end cpu arm1020t
# V5TE Architecture Processors # V5TE Architecture Processors
begin cpu arm9e begin cpu arm9e
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm9e end cpu arm9e
...@@ -787,8 +785,7 @@ end cpu arm9e ...@@ -787,8 +785,7 @@ end cpu arm9e
begin cpu arm946e-s begin cpu arm946e-s
cname arm946es cname arm946es
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm946e-s end cpu arm946e-s
...@@ -796,8 +793,7 @@ end cpu arm946e-s ...@@ -796,8 +793,7 @@ end cpu arm946e-s
begin cpu arm966e-s begin cpu arm966e-s
cname arm966es cname arm966es
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm966e-s end cpu arm966e-s
...@@ -805,32 +801,28 @@ end cpu arm966e-s ...@@ -805,32 +801,28 @@ end cpu arm966e-s
begin cpu arm968e-s begin cpu arm968e-s
cname arm968es cname arm968es
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm968e-s end cpu arm968e-s
begin cpu arm10e begin cpu arm10e
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs fastmul costs fastmul
end cpu arm10e end cpu arm10e
begin cpu arm1020e begin cpu arm1020e
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs fastmul costs fastmul
end cpu arm1020e end cpu arm1020e
begin cpu arm1022e begin cpu arm1022e
tune flags LDSCHED tune flags LDSCHED
architecture armv5te architecture armv5te+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs fastmul costs fastmul
end cpu arm1022e end cpu arm1022e
...@@ -883,8 +875,7 @@ end cpu fa726te ...@@ -883,8 +875,7 @@ end cpu fa726te
begin cpu arm926ej-s begin cpu arm926ej-s
cname arm926ejs cname arm926ejs
tune flags LDSCHED tune flags LDSCHED
architecture armv5tej architecture armv5tej+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm926ej-s end cpu arm926ej-s
...@@ -892,8 +883,7 @@ end cpu arm926ej-s ...@@ -892,8 +883,7 @@ end cpu arm926ej-s
begin cpu arm1026ej-s begin cpu arm1026ej-s
cname arm1026ejs cname arm1026ejs
tune flags LDSCHED tune flags LDSCHED
architecture armv5tej architecture armv5tej+fp
fpu vfpv2
option nofp remove ALL_FP option nofp remove ALL_FP
costs 9e costs 9e
end cpu arm1026ej-s end cpu arm1026ej-s
...@@ -910,8 +900,7 @@ end cpu arm1136j-s ...@@ -910,8 +900,7 @@ end cpu arm1136j-s
begin cpu arm1136jf-s begin cpu arm1136jf-s
cname arm1136jfs cname arm1136jfs
tune flags LDSCHED tune flags LDSCHED
architecture armv6j architecture armv6j+fp
fpu vfpv2
costs 9e costs 9e
end cpu arm1136jf-s end cpu arm1136jf-s
...@@ -925,8 +914,7 @@ end cpu arm1176jz-s ...@@ -925,8 +914,7 @@ end cpu arm1176jz-s
begin cpu arm1176jzf-s begin cpu arm1176jzf-s
cname arm1176jzfs cname arm1176jzfs
tune flags LDSCHED tune flags LDSCHED
architecture armv6kz architecture armv6kz+fp
fpu vfpv2
costs 9e costs 9e
end cpu arm1176jzf-s end cpu arm1176jzf-s
...@@ -938,8 +926,7 @@ end cpu mpcorenovfp ...@@ -938,8 +926,7 @@ end cpu mpcorenovfp
begin cpu mpcore begin cpu mpcore
tune flags LDSCHED tune flags LDSCHED
architecture armv6k architecture armv6k+fp
fpu vfpv2
costs 9e costs 9e
end cpu mpcore end cpu mpcore
...@@ -953,8 +940,7 @@ end cpu arm1156t2-s ...@@ -953,8 +940,7 @@ end cpu arm1156t2-s
begin cpu arm1156t2f-s begin cpu arm1156t2f-s
cname arm1156t2fs cname arm1156t2fs
tune flags LDSCHED tune flags LDSCHED
architecture armv6t2 architecture armv6t2+fp
fpu vfpv2
costs v6t2 costs v6t2
end cpu arm1156t2f-s end cpu arm1156t2f-s
...@@ -1012,8 +998,7 @@ end cpu cortex-m0plus.small-multiply ...@@ -1012,8 +998,7 @@ end cpu cortex-m0plus.small-multiply
begin cpu generic-armv7-a begin cpu generic-armv7-a
cname genericv7a cname genericv7a
tune flags LDSCHED tune flags LDSCHED
architecture armv7-a architecture armv7-a+fp
fpu vfpv3-d16
option vfpv3-d16 add VFPv3 FP_DBL option vfpv3-d16 add VFPv3 FP_DBL
option vfpv3 add VFPv3 FP_D32 option vfpv3 add VFPv3 FP_D32
option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv
...@@ -1033,8 +1018,7 @@ end cpu generic-armv7-a ...@@ -1033,8 +1018,7 @@ end cpu generic-armv7-a
begin cpu cortex-a5 begin cpu cortex-a5
cname cortexa5 cname cortexa5
tune flags LDSCHED tune flags LDSCHED
architecture armv7-a architecture armv7-a+neon-fp16
fpu neon-fp16
option nosimd remove ALL_SIMD option nosimd remove ALL_SIMD
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a5 costs cortex_a5
...@@ -1043,8 +1027,7 @@ end cpu cortex-a5 ...@@ -1043,8 +1027,7 @@ end cpu cortex-a5
begin cpu cortex-a7 begin cpu cortex-a7
cname cortexa7 cname cortexa7
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nosimd remove ALL_SIMD option nosimd remove ALL_SIMD
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a7 costs cortex_a7
...@@ -1053,8 +1036,7 @@ end cpu cortex-a7 ...@@ -1053,8 +1036,7 @@ end cpu cortex-a7
begin cpu cortex-a8 begin cpu cortex-a8
cname cortexa8 cname cortexa8
tune flags LDSCHED tune flags LDSCHED
architecture armv7-a architecture armv7-a+simd
fpu neon-vfpv3
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a8 costs cortex_a8
end cpu cortex-a8 end cpu cortex-a8
...@@ -1062,8 +1044,7 @@ end cpu cortex-a8 ...@@ -1062,8 +1044,7 @@ end cpu cortex-a8
begin cpu cortex-a9 begin cpu cortex-a9
cname cortexa9 cname cortexa9
tune flags LDSCHED tune flags LDSCHED
architecture armv7-a architecture armv7-a+neon-fp16
fpu neon-fp16
option nosimd remove ALL_SIMD option nosimd remove ALL_SIMD
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a9 costs cortex_a9
...@@ -1073,8 +1054,7 @@ begin cpu cortex-a12 ...@@ -1073,8 +1054,7 @@ begin cpu cortex-a12
cname cortexa12 cname cortexa12
tune for cortex-a17 tune for cortex-a17
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a12 costs cortex_a12
end cpu cortex-a12 end cpu cortex-a12
...@@ -1082,8 +1062,7 @@ end cpu cortex-a12 ...@@ -1082,8 +1062,7 @@ end cpu cortex-a12
begin cpu cortex-a15 begin cpu cortex-a15
cname cortexa15 cname cortexa15
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a15 costs cortex_a15
end cpu cortex-a15 end cpu cortex-a15
...@@ -1091,8 +1070,7 @@ end cpu cortex-a15 ...@@ -1091,8 +1070,7 @@ end cpu cortex-a15
begin cpu cortex-a17 begin cpu cortex-a17
cname cortexa17 cname cortexa17
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a12 costs cortex_a12
end cpu cortex-a17 end cpu cortex-a17
...@@ -1107,16 +1085,14 @@ end cpu cortex-r4 ...@@ -1107,16 +1085,14 @@ end cpu cortex-r4
begin cpu cortex-r4f begin cpu cortex-r4f
cname cortexr4f cname cortexr4f
tune flags LDSCHED tune flags LDSCHED
architecture armv7-r architecture armv7-r+fp
fpu vfpv3-d16
costs cortex costs cortex
end cpu cortex-r4f end cpu cortex-r4f
begin cpu cortex-r5 begin cpu cortex-r5
cname cortexr5 cname cortexr5
tune flags LDSCHED tune flags LDSCHED
architecture armv7-r+idiv architecture armv7-r+idiv+fp
fpu vfpv3-d16
option nofp.dp remove FP_DBL option nofp.dp remove FP_DBL
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex costs cortex
...@@ -1125,8 +1101,7 @@ end cpu cortex-r5 ...@@ -1125,8 +1101,7 @@ end cpu cortex-r5
begin cpu cortex-r7 begin cpu cortex-r7
cname cortexr7 cname cortexr7
tune flags LDSCHED tune flags LDSCHED
architecture armv7-r+idiv architecture armv7-r+idiv+fp
fpu vfpv3-d16
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex costs cortex
end cpu cortex-r7 end cpu cortex-r7
...@@ -1135,8 +1110,7 @@ begin cpu cortex-r8 ...@@ -1135,8 +1110,7 @@ begin cpu cortex-r8
cname cortexr8 cname cortexr8
tune for cortex-r7 tune for cortex-r7
tune flags LDSCHED tune flags LDSCHED
architecture armv7-r+idiv architecture armv7-r+idiv+fp
fpu vfpv3-d16
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex costs cortex
end cpu cortex-r8 end cpu cortex-r8
...@@ -1144,9 +1118,8 @@ end cpu cortex-r8 ...@@ -1144,9 +1118,8 @@ end cpu cortex-r8
begin cpu cortex-m7 begin cpu cortex-m7
cname cortexm7 cname cortexm7
tune flags LDSCHED tune flags LDSCHED
architecture armv7e-m architecture armv7e-m+fp.dp
isa quirk_no_volatile_ce isa quirk_no_volatile_ce
fpu fpv5-d16
option nofp.dp remove FP_DBL option nofp.dp remove FP_DBL
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_m7 costs cortex_m7
...@@ -1155,8 +1128,7 @@ end cpu cortex-m7 ...@@ -1155,8 +1128,7 @@ end cpu cortex-m7
begin cpu cortex-m4 begin cpu cortex-m4
cname cortexm4 cname cortexm4
tune flags LDSCHED tune flags LDSCHED
architecture armv7e-m architecture armv7e-m+fp
fpu fpv4-sp-d16
option nofp remove ALL_FP option nofp remove ALL_FP
costs v7m costs v7m
end cpu cortex-m4 end cpu cortex-m4
...@@ -1181,8 +1153,7 @@ begin cpu cortex-a15.cortex-a7 ...@@ -1181,8 +1153,7 @@ begin cpu cortex-a15.cortex-a7
cname cortexa15cortexa7 cname cortexa15cortexa7
tune for cortex-a7 tune for cortex-a7
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a15 costs cortex_a15
end cpu cortex-a15.cortex-a7 end cpu cortex-a15.cortex-a7
...@@ -1191,8 +1162,7 @@ begin cpu cortex-a17.cortex-a7 ...@@ -1191,8 +1162,7 @@ begin cpu cortex-a17.cortex-a7
cname cortexa17cortexa7 cname cortexa17cortexa7
tune for cortex-a7 tune for cortex-a7
tune flags LDSCHED tune flags LDSCHED
architecture armv7ve architecture armv7ve+simd
fpu neon-vfpv4
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a12 costs cortex_a12
end cpu cortex-a17.cortex-a7 end cpu cortex-a17.cortex-a7
...@@ -1203,8 +1173,7 @@ begin cpu cortex-a32 ...@@ -1203,8 +1173,7 @@ begin cpu cortex-a32
cname cortexa32 cname cortexa32
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a35 costs cortex_a35
...@@ -1214,8 +1183,7 @@ begin cpu cortex-a35 ...@@ -1214,8 +1183,7 @@ begin cpu cortex-a35
cname cortexa35 cname cortexa35
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a35 costs cortex_a35
...@@ -1224,8 +1192,7 @@ end cpu cortex-a35 ...@@ -1224,8 +1192,7 @@ end cpu cortex-a35
begin cpu cortex-a53 begin cpu cortex-a53
cname cortexa53 cname cortexa53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a53 costs cortex_a53
...@@ -1234,8 +1201,7 @@ end cpu cortex-a53 ...@@ -1234,8 +1201,7 @@ end cpu cortex-a53
begin cpu cortex-a57 begin cpu cortex-a57
cname cortexa57 cname cortexa57
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a57 end cpu cortex-a57
...@@ -1244,8 +1210,7 @@ begin cpu cortex-a72 ...@@ -1244,8 +1210,7 @@ begin cpu cortex-a72
cname cortexa72 cname cortexa72
tune for cortex-a57 tune for cortex-a57
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a72 end cpu cortex-a72
...@@ -1254,8 +1219,7 @@ begin cpu cortex-a73 ...@@ -1254,8 +1219,7 @@ begin cpu cortex-a73
cname cortexa73 cname cortexa73
tune for cortex-a57 tune for cortex-a57
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a73 costs cortex_a73
end cpu cortex-a73 end cpu cortex-a73
...@@ -1263,16 +1227,14 @@ end cpu cortex-a73 ...@@ -1263,16 +1227,14 @@ end cpu cortex-a73
begin cpu exynos-m1 begin cpu exynos-m1
cname exynosm1 cname exynosm1
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs exynosm1 costs exynosm1
end cpu exynos-m1 end cpu exynos-m1
begin cpu xgene1 begin cpu xgene1
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a architecture armv8-a+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs xgene1 costs xgene1
end cpu xgene1 end cpu xgene1
...@@ -1282,8 +1244,7 @@ begin cpu cortex-a57.cortex-a53 ...@@ -1282,8 +1244,7 @@ begin cpu cortex-a57.cortex-a53
cname cortexa57cortexa53 cname cortexa57cortexa53
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a57.cortex-a53 end cpu cortex-a57.cortex-a53
...@@ -1292,8 +1253,7 @@ begin cpu cortex-a72.cortex-a53 ...@@ -1292,8 +1253,7 @@ begin cpu cortex-a72.cortex-a53
cname cortexa72cortexa53 cname cortexa72cortexa53
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a72.cortex-a53 end cpu cortex-a72.cortex-a53
...@@ -1302,8 +1262,7 @@ begin cpu cortex-a73.cortex-a35 ...@@ -1302,8 +1262,7 @@ begin cpu cortex-a73.cortex-a35
cname cortexa73cortexa35 cname cortexa73cortexa35
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a73 costs cortex_a73
end cpu cortex-a73.cortex-a35 end cpu cortex-a73.cortex-a35
...@@ -1312,8 +1271,7 @@ begin cpu cortex-a73.cortex-a53 ...@@ -1312,8 +1271,7 @@ begin cpu cortex-a73.cortex-a53
cname cortexa73cortexa53 cname cortexa73cortexa53
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8-a+crc architecture armv8-a+crc+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a73 costs cortex_a73
end cpu cortex-a73.cortex-a53 end cpu cortex-a73.cortex-a53
...@@ -1324,8 +1282,7 @@ begin cpu cortex-a55 ...@@ -1324,8 +1282,7 @@ begin cpu cortex-a55
cname cortexa55 cname cortexa55
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod architecture armv8.2-a+fp16+dotprod+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
option nofp remove ALL_FP option nofp remove ALL_FP
costs cortex_a53 costs cortex_a53
...@@ -1335,8 +1292,7 @@ begin cpu cortex-a75 ...@@ -1335,8 +1292,7 @@ begin cpu cortex-a75
cname cortexa75 cname cortexa75
tune for cortex-a57 tune for cortex-a57
tune flags LDSCHED tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod architecture armv8.2-a+fp16+dotprod+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a73 costs cortex_a73
end cpu cortex-a75 end cpu cortex-a75
...@@ -1345,8 +1301,7 @@ begin cpu cortex-a76 ...@@ -1345,8 +1301,7 @@ begin cpu cortex-a76
cname cortexa76 cname cortexa76
tune for cortex-a57 tune for cortex-a57
tune flags LDSCHED tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod architecture armv8.2-a+fp16+dotprod+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a76 end cpu cortex-a76
...@@ -1356,8 +1311,7 @@ begin cpu cortex-a75.cortex-a55 ...@@ -1356,8 +1311,7 @@ begin cpu cortex-a75.cortex-a55
cname cortexa75cortexa55 cname cortexa75cortexa55
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod architecture armv8.2-a+fp16+dotprod+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a73 costs cortex_a73
end cpu cortex-a75.cortex-a55 end cpu cortex-a75.cortex-a55
...@@ -1366,8 +1320,7 @@ begin cpu cortex-a76.cortex-a55 ...@@ -1366,8 +1320,7 @@ begin cpu cortex-a76.cortex-a55
cname cortexa76cortexa55 cname cortexa76cortexa55
tune for cortex-a53 tune for cortex-a53
tune flags LDSCHED tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod architecture armv8.2-a+fp16+dotprod+simd
fpu neon-fp-armv8
option crypto add FP_ARMv8 CRYPTO option crypto add FP_ARMv8 CRYPTO
costs cortex_a57 costs cortex_a57
end cpu cortex-a76.cortex-a55 end cpu cortex-a76.cortex-a55
...@@ -1383,8 +1336,7 @@ end cpu cortex-m23 ...@@ -1383,8 +1336,7 @@ end cpu cortex-m23
begin cpu cortex-m33 begin cpu cortex-m33
cname cortexm33 cname cortexm33
tune flags LDSCHED tune flags LDSCHED
architecture armv8-m.main+dsp architecture armv8-m.main+dsp+fp
fpu fpv5-sp-d16
option nofp remove ALL_FP option nofp remove ALL_FP
option nodsp remove armv7em option nodsp remove armv7em
costs v7m costs v7m
...@@ -1395,7 +1347,6 @@ begin cpu cortex-r52 ...@@ -1395,7 +1347,6 @@ begin cpu cortex-r52
cname cortexr52 cname cortexr52
tune flags LDSCHED tune flags LDSCHED
architecture armv8-r+crc+simd architecture armv8-r+crc+simd
fpu neon-fp-armv8
option nofp.dp remove FP_DBL ALL_SIMD option nofp.dp remove FP_DBL ALL_SIMD
costs cortex costs cortex
end cpu cortex-r52 end cpu cortex-r52
......
gcc/config/arm/parsecpu.awk
...@@ -289,9 +289,6 @@ function gen_comm_data () { ...@@ -289,9 +289,6 @@ function gen_comm_data () {
} }
all_isa_bits = all_isa_bits " " arch_opt_isa[feats[1],feats[m]] all_isa_bits = all_isa_bits " " arch_opt_isa[feats[1],feats[m]]
} }
if (cpus[n] in cpu_fpu) {
all_isa_bits = all_isa_bits " " fpu_isa[cpu_fpu[cpus[n]]]
}
if (cpus[n] in cpu_isa) { if (cpus[n] in cpu_isa) {
all_isa_bits = all_isa_bits " " cpu_isa[cpus[n]] all_isa_bits = all_isa_bits " " cpu_isa[cpus[n]]
} }
...@@ -662,13 +659,6 @@ BEGIN { ...@@ -662,13 +659,6 @@ BEGIN {
parse_ok = 1 parse_ok = 1
} }
/^[ ]*fpu / {
if (NF != 2) fatal("syntax: fpu <fpu-name>")
if (cpu_name == "") fatal("\"fpu\" outside of cpu block")
cpu_fpu[cpu_name] = $2
parse_ok = 1
}
/^[ ]*isa / { /^[ ]*isa / {
if (NF < 2) fatal("syntax: isa <feature-or-fgroup> [<feature-or-fgroup>]*") if (NF < 2) fatal("syntax: isa <feature-or-fgroup> [<feature-or-fgroup>]*")
flags="" flags=""
......
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