Commit dcfedcd0 by Richard Kenner

*** empty log message ***

From-SVN: r730
parent cdc54cc9
...@@ -1153,6 +1153,7 @@ mostlyclean: ...@@ -1153,6 +1153,7 @@ mostlyclean:
for name in $(LIB1FUNCS); do rm -f $${name}.c; done for name in $(LIB1FUNCS); do rm -f $${name}.c; done
# Delete other temporary files. # Delete other temporary files.
-rm -f tmp-float.h tmp-*proto.1 tmp-gcc.xtar.Z tmp-limits.h gccnew -rm -f tmp-float.h tmp-*proto.1 tmp-gcc.xtar.Z tmp-limits.h gccnew
-rm -f tmp-foo1 tmp-foo2
# Delete the stamp files. # Delete the stamp files.
-rm -f stamp-* tmp-* -rm -f stamp-* tmp-*
# Delete debugging dump files. # Delete debugging dump files.
...@@ -1550,6 +1551,26 @@ bootstrap2: force ...@@ -1550,6 +1551,26 @@ bootstrap2: force
bootstrap3: force bootstrap3: force
$(MAKE) CC="stage2/gcc -Bstage2/" CFLAGS="$(BOOT_CFLAGS)" libdir=$(libdir) LANGUAGES="$(LANGUAGES)" $(MAKE) CC="stage2/gcc -Bstage2/" CFLAGS="$(BOOT_CFLAGS)" libdir=$(libdir) LANGUAGES="$(LANGUAGES)"
# Compare the object files in the current directory with those in the
# stage2 directory.
compare: force
for file in *.o; do \
tail +10c $file > tmp-foo1; \
tail +10c stage2/$file > tmp-foo2; \
cmp tmp-foo1 tmp-foo2 || echo $file differs; \
done
-rm -f tmp-foo*
# Similar, but compare with stage3 directory
compare3: force
for file in *.o; do \
tail +10c $file > tmp-foo1; \
tail +10c stage3/$file > tmp-foo2; \
cmp tmp-foo1 tmp-foo2 || echo $file differs; \
done
-rm -f tmp-foo*
# Copy the object files from a particular stage into a subdirectory. # Copy the object files from a particular stage into a subdirectory.
stage1: force stage1: force
-if [ -d stage1 ] ; then true ; else mkdir stage1 ; fi -if [ -d stage1 ] ; then true ; else mkdir stage1 ; fi
......
...@@ -98,6 +98,17 @@ u_short_cint_operand (op, mode) ...@@ -98,6 +98,17 @@ u_short_cint_operand (op, mode)
return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
} }
/* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
int
non_short_cint_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
return (GET_CODE (op) == CONST_INT
&& (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
}
/* Returns 1 if OP is a register that is not special (i.e., not MQ, /* Returns 1 if OP is a register that is not special (i.e., not MQ,
ctr, or lr). */ ctr, or lr). */
...@@ -248,6 +259,18 @@ add_operand (op, mode) ...@@ -248,6 +259,18 @@ add_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
} }
/* Return 1 if OP is a constant but not a valid add_operand. */
int
non_add_cint_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
return (GET_CODE (op) == CONST_INT
&& (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
&& (INTVAL (op) & 0xffff) != 0);
}
/* Return 1 if the operand is a non-special register or a constant that /* Return 1 if the operand is a non-special register or a constant that
can be used as the operand of an OR or XOR insn on the RS/6000. */ can be used as the operand of an OR or XOR insn on the RS/6000. */
...@@ -262,6 +285,19 @@ logical_operand (op, mode) ...@@ -262,6 +285,19 @@ logical_operand (op, mode)
|| (INTVAL (op) & 0xffff) == 0))); || (INTVAL (op) & 0xffff) == 0)));
} }
/* Return 1 if C is a constant that is not a logical operand (as
above). */
int
non_logical_cint_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
return (GET_CODE (op) == CONST_INT
&& (INTVAL (op) & 0xffff0000) != 0
&& (INTVAL (op) & 0xffff) != 0);
}
/* Return 1 if C is a constant that can be encoded in a mask on the /* Return 1 if C is a constant that can be encoded in a mask on the
RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
Reject all ones and all zeros, since these should have been optimized Reject all ones and all zeros, since these should have been optimized
...@@ -310,6 +346,17 @@ and_operand (op, mode) ...@@ -310,6 +346,17 @@ and_operand (op, mode)
|| mask_operand (op, mode)); || mask_operand (op, mode));
} }
/* Return 1 if the operand is a constant but not a valid operand for an AND
insn. */
int
non_and_cint_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
}
/* Return 1 if the operand is a general register or memory operand. */ /* Return 1 if the operand is a general register or memory operand. */
int int
......
...@@ -1155,6 +1155,9 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line) ...@@ -1155,6 +1155,9 @@ expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
if (j < 0) if (j < 0)
{ {
if (j == -3)
continue;
error ("unknown register name `%s' in `asm'", regname); error ("unknown register name `%s' in `asm'", regname);
return; return;
} }
......
...@@ -211,8 +211,10 @@ strip_reg_name (name) ...@@ -211,8 +211,10 @@ strip_reg_name (name)
/* Decode an `asm' spec for a declaration as a register name. /* Decode an `asm' spec for a declaration as a register name.
Return the register number, or -1 if nothing specified, Return the register number, or -1 if nothing specified,
or -2 if the name is not a register. Accept an exact spelling or or -2 if the ASMSPEC is not `cc' and is recognized,
a decimal number. Prefixes such as % are optional. */ or -3 if ASMSPEC is `cc' and is not recognized.
Accept an exact spelling or a decimal number.
Prefixes such as % are optional. */
int int
decode_reg_name (asmspec) decode_reg_name (asmspec)
...@@ -254,6 +256,9 @@ decode_reg_name (asmspec) ...@@ -254,6 +256,9 @@ decode_reg_name (asmspec)
} }
#endif /* ADDITIONAL_REGISTER_NAMES */ #endif /* ADDITIONAL_REGISTER_NAMES */
if (!strcmp (asmspec, "cc"))
return -3;
return -2; return -2;
} }
...@@ -302,10 +307,10 @@ make_decl_rtl (decl, asmspec, top_level) ...@@ -302,10 +307,10 @@ make_decl_rtl (decl, asmspec, top_level)
if (TREE_REGDECL (decl) && reg_number == -1) if (TREE_REGDECL (decl) && reg_number == -1)
error_with_decl (decl, error_with_decl (decl,
"register name not specified for `%s'"); "register name not specified for `%s'");
else if (TREE_REGDECL (decl) && reg_number == -2) else if (TREE_REGDECL (decl) && reg_number < 0)
error_with_decl (decl, error_with_decl (decl,
"invalid register name for `%s'"); "invalid register name for `%s'");
else if (reg_number >= 0 && ! TREE_REGDECL (decl)) else if ((reg_number >= 0 || reg_number == -3) && ! TREE_REGDECL (decl))
error_with_decl (decl, error_with_decl (decl,
"register name given for non-register variable `%s'"); "register name given for non-register variable `%s'");
else if (TREE_REGDECL (decl) && TREE_CODE (decl) == FUNCTION_DECL) else if (TREE_REGDECL (decl) && TREE_CODE (decl) == FUNCTION_DECL)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment