Commit dad89f7c by Terry Guo Committed by Xuepeng Guo

cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit.

	* config/arm/cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit.
	Replace with ...
	(cortex_m4_v_a,  cortex_m4_v_b): ... new cpu units.
	(cortex_m4_v, cortex_m4_exa_va, cortex_m4_exb_vb): New reservations.
	(cortex_m4_fmacs): Use new reservations.
	(cortex_m4_f_load, cortex_m4_f_store): Likewise.

From-SVN: r198084
parent f1e6512c
2013-04-19 Terry Guo <terry.guo@arm.com>
* config/arm/cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit.
Replace with ...
(cortex_m4_v_a, cortex_m4_v_b): ... new cpu units.
(cortex_m4_v, cortex_m4_exa_va, cortex_m4_exb_vb): New reservations.
(cortex_m4_fmacs): Use new reservations.
(cortex_m4_f_load, cortex_m4_f_store): Likewise.
2013-04-18 Vladimir Makarov <vmakarov@redhat.com> 2013-04-18 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/56999 PR rtl-optimization/56999
......
...@@ -18,10 +18,14 @@ ...@@ -18,10 +18,14 @@
;; along with GCC; see the file COPYING3. If not see ;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. ;; <http://www.gnu.org/licenses/>.
;; Use an artifial unit to model FPU. ;; Use two artificial units to model FPU.
(define_cpu_unit "cortex_m4_v" "cortex_m4") (define_cpu_unit "cortex_m4_v_a" "cortex_m4")
(define_cpu_unit "cortex_m4_v_b" "cortex_m4")
(define_reservation "cortex_m4_v" "cortex_m4_v_a+cortex_m4_v_b")
(define_reservation "cortex_m4_ex_v" "cortex_m4_ex+cortex_m4_v") (define_reservation "cortex_m4_ex_v" "cortex_m4_ex+cortex_m4_v")
(define_reservation "cortex_m4_exa_va" "cortex_m4_a+cortex_m4_v_a")
(define_reservation "cortex_m4_exb_vb" "cortex_m4_b+cortex_m4_v_b")
;; Integer instructions following VDIV or VSQRT complete out-of-order. ;; Integer instructions following VDIV or VSQRT complete out-of-order.
(define_insn_reservation "cortex_m4_fdivs" 15 (define_insn_reservation "cortex_m4_fdivs" 15
...@@ -44,10 +48,12 @@ ...@@ -44,10 +48,12 @@
(eq_attr "type" "fmuls")) (eq_attr "type" "fmuls"))
"cortex_m4_ex_v") "cortex_m4_ex_v")
;; Integer instructions following multiply-accumulate instructions
;; complete out-of-order.
(define_insn_reservation "cortex_m4_fmacs" 4 (define_insn_reservation "cortex_m4_fmacs" 4
(and (eq_attr "tune" "cortexm4") (and (eq_attr "tune" "cortexm4")
(eq_attr "type" "fmacs,ffmas")) (eq_attr "type" "fmacs,ffmas"))
"cortex_m4_ex_v*3") "cortex_m4_ex_v,cortex_m4_v*2")
(define_insn_reservation "cortex_m4_ffariths" 1 (define_insn_reservation "cortex_m4_ffariths" 1
(and (eq_attr "tune" "cortexm4") (and (eq_attr "tune" "cortexm4")
...@@ -77,12 +83,12 @@ ...@@ -77,12 +83,12 @@
(define_insn_reservation "cortex_m4_f_load" 2 (define_insn_reservation "cortex_m4_f_load" 2
(and (eq_attr "tune" "cortexm4") (and (eq_attr "tune" "cortexm4")
(eq_attr "type" "f_loads")) (eq_attr "type" "f_loads"))
"cortex_m4_ex_v*2") "cortex_m4_exa_va,cortex_m4_exb_vb")
(define_insn_reservation "cortex_m4_f_store" 2 (define_insn_reservation "cortex_m4_f_store" 1
(and (eq_attr "tune" "cortexm4") (and (eq_attr "tune" "cortexm4")
(eq_attr "type" "f_stores")) (eq_attr "type" "f_stores"))
"cortex_m4_ex_v*2") "cortex_m4_exa_va")
(define_insn_reservation "cortex_m4_f_loadd" 3 (define_insn_reservation "cortex_m4_f_loadd" 3
(and (eq_attr "tune" "cortexm4") (and (eq_attr "tune" "cortexm4")
......
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