Skip to content

R
riscv-gcc-1
Commit d8b08ecd by Uros Bizjak
Options

i386.h (enum ix86_tune_indices): Rename from X86_TUNE_ADD_ESP_4. 

	* config/i386/i386.h (enum ix86_tune_indices) <X86_TUNE_SINGLE_POP>:
	Rename from X86_TUNE_ADD_ESP_4.
	<IX86_TUNE_DOUBLE_POP>: Rename from X86_TUNE_ADD_ESP_8.
	<IX86_TUNE_SINGLE_PUSH>: Rename from X86_TUNE_SUB_ESP_4.
	<IX86_TUNE_DOUBLE_PUSH>: Rename from X86_TUNE_SUB_ESP_8.
	(TARGET_SINGLE_POP): Rename from TARGET_ADD_ESP_4.
	(TARGET_DOUBLE_POP): Rename from TARGET_ADD_ESP_8.
	(TARGET_SINGLE_PUSH): Rename from TARGET_SUB_ESP_4.
	(TARGET_DOUBLE_POP): Rename from TARGET_SUB_ESP_8.
	* config/i386/i386.c (initial_ix86_tune_features)
	<X86_TUNE_SINGLE_POP>: Invert members.
	<X86_TUNE_DOUBLE_POP>: Ditto.
	<X86_TUNE_SINGLE_PUSH>: Ditto.
	<X86_TUNE_DOUBLE_PUSH>: Ditto.
	* config/i386/i386.md (*pop<mode>1): Rename from pop<mode>1.
	No longer exported.
	(push peephole2 patterns): Macroize peepholes using P mode iterator.
	Adjust for renamed TARGET_{SINGLE,DOUBLE}_PUSH defines.
	(pop peephole2 patterns): Macroize peepholes using P mode iterator.
	Adjust for renamed TARGET_{SINGLE,DOUBLE}_POP defines.

From-SVN: r163732
parent 558af7ca
Showing with 45 additions and 24 deletions
gcc/ChangeLog
2010-09-01 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.h (enum ix86_tune_indices) <X86_TUNE_SINGLE_POP>:
Rename from X86_TUNE_ADD_ESP_4.
<IX86_TUNE_DOUBLE_POP>: Rename from X86_TUNE_ADD_ESP_8.
<IX86_TUNE_SINGLE_PUSH>: Rename from X86_TUNE_SUB_ESP_4.
<IX86_TUNE_DOUBLE_PUSH>: Rename from X86_TUNE_SUB_ESP_8.
(TARGET_SINGLE_POP): Rename from TARGET_ADD_ESP_4.
(TARGET_DOUBLE_POP): Rename from TARGET_ADD_ESP_8.
(TARGET_SINGLE_PUSH): Rename from TARGET_SUB_ESP_4.
(TARGET_DOUBLE_POP): Rename from TARGET_SUB_ESP_8.
* config/i386/i386.c (initial_ix86_tune_features)
<X86_TUNE_SINGLE_POP>: Invert members.
<X86_TUNE_DOUBLE_POP>: Ditto.
<X86_TUNE_SINGLE_PUSH>: Ditto.
<X86_TUNE_DOUBLE_PUSH>: Ditto.
* config/i386/i386.md (*pop<mode>1): Rename from pop<mode>1.
No longer exported.
(push peephole2 patterns): Macroize peepholes using P mode iterator.
Adjust for renamed TARGET_{SINGLE,DOUBLE}_PUSH defines.
(pop peephole2 patterns): Macroize peepholes using P mode iterator.
Adjust for renamed TARGET_{SINGLE,DOUBLE}_POP defines.
2010-09-01 Eric Botcazou <ebotcazou@adacore.com>
* gimplify.c (gimplify_init_constructor): Do not create a temporary for
......@@ -16,15 +39,13 @@
* tree-vrp.c (adjust_range_with_scev): Use number of iteration
estimate.
(vrp_visit_phi_node): Delay using SCEV till we balloon the
range.
(vrp_visit_phi_node): Delay using SCEV till we balloon the range.
(execute_vrp): Compute number of iteration estimates.
* cfgloop.h (estimate_numbers_of_iterations_loop): Adjust prototype.
* tree-flow.h (estimate_numbers_of_iterations): Likewise.
* tree-data-ref.c (estimated_loop_iterations): Adjust.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop):
Infer loop bounds from undefined behavior based on a new
parameter.
Infer loop bounds from undefined behavior based on a new parameter.
(estimate_numbers_of_iterations): Likewise.
(scev_probably_wraps_p): Adjust.
* tree-ssa-loop.c (tree_ssa_loop_bounds): Likewise.
......
gcc/config/i386/i386.c
......@@ -1480,21 +1480,21 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
/* X86_TUNE_PROMOTE_HI_REGS */
m_PPRO,
/* X86_TUNE_ADD_ESP_4: Enable if add/sub is preferred over 1/2 push/pop. */
m_ATOM | m_AMD_MULTIPLE | m_K6_GEODE | m_PENT4 | m_NOCONA
| m_CORE2 | m_GENERIC,
/* X86_TUNE_SINGLE_POP: Enable if single pop insn is preferred
over esp addition. */
m_386 | m_486 | m_PENT | m_PPRO,
/* X86_TUNE_ADD_ESP_8 */
m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_K6_GEODE | m_386
| m_486 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
/* X86_TUNE_DOUBLE_POP: Enable if double pop insn is preferred
over esp addition. */
m_PENT,
/* X86_TUNE_SUB_ESP_4 */
m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_PENT4 | m_NOCONA | m_CORE2
| m_GENERIC,
/* X86_TUNE_SINGLE_PUSH: Enable if single push insn is preferred
over esp subtraction. */
m_386 | m_486 | m_PENT | m_K6_GEODE,
/* X86_TUNE_SUB_ESP_8 */
m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_386 | m_486
| m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
/* X86_TUNE_DOUBLE_PUSH. Enable if double push insn is preferred
over esp subtraction. */
m_PENT | m_K6_GEODE,
/* X86_TUNE_INTEGER_DFMODE_MOVES: Enable if integer moves are preferred
for DFmode copies */
......
gcc/config/i386/i386.h
......@@ -274,10 +274,10 @@ enum ix86_tune_indices {
X86_TUNE_HIMODE_MATH,
X86_TUNE_PROMOTE_QI_REGS,
X86_TUNE_PROMOTE_HI_REGS,
X86_TUNE_ADD_ESP_4,
X86_TUNE_ADD_ESP_8,
X86_TUNE_SUB_ESP_4,
X86_TUNE_SUB_ESP_8,
X86_TUNE_SINGLE_POP,
X86_TUNE_DOUBLE_POP,
X86_TUNE_SINGLE_PUSH,
X86_TUNE_DOUBLE_PUSH,
X86_TUNE_INTEGER_DFMODE_MOVES,
X86_TUNE_PARTIAL_REG_DEPENDENCY,
X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY,
......@@ -348,10 +348,10 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
#define TARGET_HIMODE_MATH ix86_tune_features[X86_TUNE_HIMODE_MATH]
#define TARGET_PROMOTE_QI_REGS ix86_tune_features[X86_TUNE_PROMOTE_QI_REGS]
#define TARGET_PROMOTE_HI_REGS ix86_tune_features[X86_TUNE_PROMOTE_HI_REGS]
#define TARGET_ADD_ESP_4 ix86_tune_features[X86_TUNE_ADD_ESP_4]
#define TARGET_ADD_ESP_8 ix86_tune_features[X86_TUNE_ADD_ESP_8]
#define TARGET_SUB_ESP_4 ix86_tune_features[X86_TUNE_SUB_ESP_4]
#define TARGET_SUB_ESP_8 ix86_tune_features[X86_TUNE_SUB_ESP_8]
#define TARGET_SINGLE_POP ix86_tune_features[X86_TUNE_SINGLE_POP]
#define TARGET_DOUBLE_POP ix86_tune_features[X86_TUNE_DOUBLE_POP]
#define TARGET_SINGLE_PUSH ix86_tune_features[X86_TUNE_SINGLE_PUSH]
#define TARGET_DOUBLE_PUSH ix86_tune_features[X86_TUNE_DOUBLE_PUSH]
#define TARGET_INTEGER_DFMODE_MOVES \
ix86_tune_features[X86_TUNE_INTEGER_DFMODE_MOVES]
#define TARGET_PARTIAL_REG_DEPENDENCY \
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment