re PR target/58361 (Wrong floating point code generated for ARM target)

	PR target/58361
	* arm/vfp.md (combine_vcvt_f32_<FCVTI32typename>): Fix pattern to
	support conditional execution.
	(combine_vcvt_f64_<FCVTI32typename>): Likewise.

From-SVN: r202475

gcc/ChangeLog

+2013-09-10  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/58361
+	* arm/vfp.md (combine_vcvt_f32_<FCVTI32typename>): Fix pattern to
+	support conditional execution.
+	(combine_vcvt_f64_<FCVTI32typename>): Likewise.
+
 2013-09-10  Vladimir Makarov  <vmakarov@redhat.com>
 
 	* lra.c (lra): Clear lra_optional_reload_pseudos before every

gcc/config/arm/vfp.md

@@ -1227,8 +1227,9 @@
 		 (match_operand 2
 			"const_double_vcvt_power_of_two_reciprocal" "Dt")))]
   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math"
-  "vcvt.f32.<FCVTI32typename>\\t%0, %1, %v2"
- [(set_attr "predicable" "no")
+  "vcvt%?.f32.<FCVTI32typename>\\t%0, %1, %v2"
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")
    (set_attr "type" "f_cvti2f")]
 )
 
@@ -1242,10 +1243,12 @@
   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math
   && !TARGET_VFP_SINGLE"
   "@
-  vmov.f32\\t%0, %1\;vcvt.f64.<FCVTI32typename>\\t%P0, %P0, %v2
-  vmov.f32\\t%0, %1\;vcvt.f64.<FCVTI32typename>\\t%P0, %P0, %v2
-  vmov.f64\\t%P0, %1, %1\;vcvt.f64.<FCVTI32typename>\\t%P0, %P0, %v2"
- [(set_attr "predicable" "no")
+  vmov%?.f32\\t%0, %1\;vcvt%?.f64.<FCVTI32typename>\\t%P0, %P0, %v2
+  vmov%?.f32\\t%0, %1\;vcvt%?.f64.<FCVTI32typename>\\t%P0, %P0, %v2
+  vmov%?.f64\\t%P0, %1, %1\;vcvt%?.f64.<FCVTI32typename>\\t%P0, %P0, %v2"
+  [(set_attr "predicable" "yes")
+   (set_attr "ce_count" "2")
+   (set_attr "predicable_short_it" "no")
    (set_attr "type" "f_cvti2f")
    (set_attr "length" "8")]
 )