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lvzhengyang
riscv-gcc-1
Commits
d6f99ca4
Commit
d6f99ca4
authored
Nov 21, 2001
by
David Edelsohn
Committed by
David Edelsohn
Nov 20, 2001
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Add cmptf missed in patch.
From-SVN: r47230
parent
b6458e85
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2 changed files
with
24 additions
and
1 deletions
+24
-1
gcc/ChangeLog
+1
-1
gcc/config/rs6000/rs6000.md
+23
-0
No files found.
gcc/ChangeLog
View file @
d6f99ca4
...
@@ -97,7 +97,7 @@ Tue Nov 20 11:56:12 2001 Douglas B. Rupp <rupp@gnat.com>
...
@@ -97,7 +97,7 @@ Tue Nov 20 11:56:12 2001 Douglas B. Rupp <rupp@gnat.com>
*
rs6000
.
h
:
...
to
here
.
*
rs6000
.
h
:
...
to
here
.
*
rs6000
.
md
(
movtf
,
extenddftf2
,
extendsftf2
,
trunctfdf2
,
*
rs6000
.
md
(
movtf
,
extenddftf2
,
extendsftf2
,
trunctfdf2
,
trunctfsf2
,
floatditf2
,
floatsitf2
,
fix_trunctfdi2
,
trunctfsf2
,
floatditf2
,
floatsitf2
,
fix_trunctfdi2
,
fix_trunctfsi2
,
negtf2
,
abstf2
,
nabstf2
)
:
New
patterns
.
fix_trunctfsi2
,
negtf2
,
abstf2
,
nabstf2
,
cmptf
)
:
New
patterns
.
Tue
Nov
20
06
:
41
:
38
2001
Richard
Kenner
<
kenner
@vlsi1
.
ultra
.
nyu
.
edu
>
Tue
Nov
20
06
:
41
:
38
2001
Richard
Kenner
<
kenner
@vlsi1
.
ultra
.
nyu
.
edu
>
...
...
gcc/config/rs6000/rs6000.md
View file @
d6f99ca4
...
@@ -9917,6 +9917,19 @@
...
@@ -9917,6 +9917,19 @@
DONE;
DONE;
}")
}")
(define_expand "cmptf"
[
(set (cc0) (compare (match_operand:DF 0 "gpc_reg_operand" "")
(match_operand:DF 1 "gpc_reg_operand" "")))]
"DEFAULT_ABI == ABI_AIX && TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128"
"
{
rs6000_compare_op0 = operands
[
0
]
;
rs6000_compare_op1 = operands
[
1
]
;
rs6000_compare_fp_p = 1;
DONE;
}")
(define_expand "beq"
(define_expand "beq"
[
(use (match_operand 0 "" ""))
]
[
(use (match_operand 0 "" ""))
]
""
""
...
@@ -10227,6 +10240,16 @@
...
@@ -10227,6 +10240,16 @@
"fcmpu %0,%1,%2"
"fcmpu %0,%1,%2"
[
(set_attr "type" "fpcompare")
]
)
[
(set_attr "type" "fpcompare")
]
)
;; Only need to compare second words if first words equal
(define_insn "
*
cmptf_internal1"
[
(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "f")
(match_operand:TF 2 "gpc_reg_operand" "f")))]
"DEFAULT_ABI == ABI_AIX && TARGET_HARD_FLOAT && TARGET_LONG_DOUBLE_128"
"fcmpu %0,%1,%2
\;
bne %0,%$+4
\;
fcmpu %0,%L1,%L2"
[
(set_attr "type" "fpcompare")
(set_attr "length" "12")])
;; Now we have the scc insns. We can do some combinations because of the
;; Now we have the scc insns. We can do some combinations because of the
;; way the machine works.
;; way the machine works.
;;
;;
...
...
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