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riscv-gcc-1
Commit d2888f1d by Richard Sandiford Committed by Richard Sandiford
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* config/mips/mips.h (MASK_DEBUG_[ABEFI], TARGET_DEBUG_[ABEFI]_MODE) 

	(TARGET_MIPS4100, TARGET_MIPS4300, TARGET_MIPS4KC, TARGET_MIPS5KC)
	(TARGET_SB1, TUNE_SB1, TUNE_SR71K, BIGGEST_MAX_ARGS_IN_REGISTERS)
	(GO_PRINTF, GO_PRINTF2, GO_DEBUG_RTX, DFMODE_NAN, SFMODE_NAN): Delete.
	(TARGET_SWITCHES): Remove MASK_DEBUG_[ABEFI].
	* config/mips/mips.c: Fix some overly-long lines.
	(SINGLE_WORD_MODE_P, PIC_OFFSET_TABLE_MASK): Delete.
	(init_cumulative_args): Remove TARGET_DEBUG_E_MODE handling.

From-SVN: r77800
parent 28ba38e3
Showing with 21 additions and 84 deletions
gcc/ChangeLog
2004-02-14 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.h (MASK_DEBUG_[ABEFI], TARGET_DEBUG_[ABEFI]_MODE)
(TARGET_MIPS4100, TARGET_MIPS4300, TARGET_MIPS4KC, TARGET_MIPS5KC)
(TARGET_SB1, TUNE_SB1, TUNE_SR71K, BIGGEST_MAX_ARGS_IN_REGISTERS)
(GO_PRINTF, GO_PRINTF2, GO_DEBUG_RTX, DFMODE_NAN, SFMODE_NAN): Delete.
(TARGET_SWITCHES): Remove MASK_DEBUG_[ABEFI].
* config/mips/mips.c: Fix some overly-long lines.
(SINGLE_WORD_MODE_P, PIC_OFFSET_TABLE_MASK): Delete.
(init_cumulative_args): Remove TARGET_DEBUG_E_MODE handling.
2004-02-13 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* configure.ac: Search for as, ld below libexec/gcc.
......
gcc/config/mips/mips.c
......@@ -73,11 +73,6 @@ enum internal_test {
ITEST_MAX
};
/* Return true if it is likely that the given mode will be accessed
using only a single instruction. */
#define SINGLE_WORD_MODE_P(MODE) \
((MODE) != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD)
/* True if X is an unspec wrapper around a SYMBOL_REF or LABEL_REF. */
#define UNSPEC_ADDRESS_P(X) \
(GET_CODE (X) == UNSPEC \
......@@ -2999,7 +2994,8 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
else
{
reg = (invert || eqne_p) ? gen_reg_rtx (mode) : result;
convert_move (reg, gen_rtx_fmt_ee (p_info->test_code, mode, cmp0, cmp1), 0);
convert_move (reg, gen_rtx_fmt_ee (p_info->test_code,
mode, cmp0, cmp1), 0);
}
if (test == ITEST_NE)
......@@ -3131,7 +3127,8 @@ gen_conditional_branch (rtx *operands, enum rtx_code test_code)
break;
default:
fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
fatal_insn ("bad test",
gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
}
/* Generate the branch. */
......@@ -3145,10 +3142,10 @@ gen_conditional_branch (rtx *operands, enum rtx_code test_code)
label1 = pc_rtx;
}
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
emit_jump_insn
(gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx_fmt_ee (test_code,
mode,
gen_rtx_fmt_ee (test_code, mode,
cmp0, cmp1),
label1, label2)));
}
......@@ -3233,9 +3230,10 @@ gen_conditional_move (rtx *operands)
emit_insn (gen_rtx_SET (op_mode, operands[0],
gen_rtx_IF_THEN_ELSE (op_mode,
gen_rtx_fmt_ee (move_code, VOIDmode,
gen_rtx_fmt_ee (move_code,
VOIDmode,
cmp_reg,
CONST0_RTX (SImode)),
const0_rtx),
operands[2], operands[3])));
}
......@@ -3608,23 +3606,6 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype,
static CUMULATIVE_ARGS zero_cum;
tree param, next_param;
if (TARGET_DEBUG_E_MODE)
{
fprintf (stderr,
"\ninit_cumulative_args, fntype = 0x%.8lx", (long)fntype);
if (!fntype)
fputc ('\n', stderr);
else
{
tree ret_type = TREE_TYPE (fntype);
fprintf (stderr, ", fntype code = %s, ret code = %s\n",
tree_code_name[(int)TREE_CODE (fntype)],
tree_code_name[(int)TREE_CODE (ret_type)]);
}
}
*cum = zero_cum;
cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
......@@ -6917,7 +6898,6 @@ mips_expand_prologue (void)
and regs. */
#define RA_MASK BITMASK_HIGH /* 1 << 31 */
#define PIC_OFFSET_TABLE_MASK (1 << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))
static void
mips_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED,
......
gcc/config/mips/mips.h
......@@ -173,14 +173,9 @@ extern const struct mips_cpu_info *mips_tune_info;
/* Debug switches, not documented */
#define MASK_DEBUG 0 /* unused */
#define MASK_DEBUG_A 0 /* don't allow <label>($reg) addrs */
#define MASK_DEBUG_B 0 /* GO_IF_LEGITIMATE_ADDRESS debug */
#define MASK_DEBUG_C 0 /* don't expand seq, etc. */
#define MASK_DEBUG_D 0 /* don't do define_split's */
#define MASK_DEBUG_E 0 /* function_arg debug */
#define MASK_DEBUG_F 0 /* ??? */
#define MASK_DEBUG_G 0 /* don't support 64 bit arithmetic */
#define MASK_DEBUG_I 0 /* unused */
/* Dummy switches used only in specs */
#define MASK_MIPS_TFILE 0 /* flag for mips-tfile usage */
......@@ -200,14 +195,9 @@ extern const struct mips_cpu_info *mips_tune_info;
/* Debug Modes */
#define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
#define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
#define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
#define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
#define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
#define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
#define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
#define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
#define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
/* Reg. Naming in .s ($21 vs. $a0) */
#define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
......@@ -322,16 +312,11 @@ extern const struct mips_cpu_info *mips_tune_info;
/* Architecture target defines. */
#define TARGET_MIPS3900 (mips_arch == PROCESSOR_R3900)
#define TARGET_MIPS4000 (mips_arch == PROCESSOR_R4000)
#define TARGET_MIPS4100 (mips_arch == PROCESSOR_R4100)
#define TARGET_MIPS4120 (mips_arch == PROCESSOR_R4120)
#define TARGET_MIPS4300 (mips_arch == PROCESSOR_R4300)
#define TARGET_MIPS4KC (mips_arch == PROCESSOR_4KC)
#define TARGET_MIPS5KC (mips_arch == PROCESSOR_5KC)
#define TARGET_MIPS5400 (mips_arch == PROCESSOR_R5400)
#define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500)
#define TARGET_MIPS7000 (mips_arch == PROCESSOR_R7000)
#define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
#define TARGET_SB1 (mips_arch == PROCESSOR_SB1)
#define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
/* Scheduling target defines. */
......@@ -344,8 +329,6 @@ extern const struct mips_cpu_info *mips_tune_info;
#define TUNE_MIPS6000 (mips_tune == PROCESSOR_R6000)
#define TUNE_MIPS7000 (mips_tune == PROCESSOR_R7000)
#define TUNE_MIPS9000 (mips_tune == PROCESSOR_R9000)
#define TUNE_SB1 (mips_tune == PROCESSOR_SB1)
#define TUNE_SR71K (mips_tune == PROCESSOR_SR71000)
#define TARGET_OLDABI (mips_abi == ABI_32 || mips_abi == ABI_O64)
#define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64)
......@@ -627,22 +610,12 @@ extern const struct mips_cpu_info *mips_tune_info;
N_("Do not lift restrictions on GOT size") }, \
{"debug", MASK_DEBUG, \
NULL}, \
{"debuga", MASK_DEBUG_A, \
NULL}, \
{"debugb", MASK_DEBUG_B, \
NULL}, \
{"debugc", MASK_DEBUG_C, \
NULL}, \
{"debugd", MASK_DEBUG_D, \
NULL}, \
{"debuge", MASK_DEBUG_E, \
NULL}, \
{"debugf", MASK_DEBUG_F, \
NULL}, \
{"debugg", MASK_DEBUG_G, \
NULL}, \
{"debugi", MASK_DEBUG_I, \
NULL}, \
{"", (TARGET_DEFAULT \
| TARGET_CPU_DEFAULT \
| TARGET_ENDIAN_DEFAULT), \
......@@ -2185,10 +2158,6 @@ extern enum reg_class mips_char_to_class[256];
#define MAX_ARGS_IN_REGISTERS (TARGET_OLDABI ? 4 : 8)
/* Largest possible value of MAX_ARGS_IN_REGISTERS. */
#define BIGGEST_MAX_ARGS_IN_REGISTERS 8
/* Symbolic macros for the first/last argument registers. */
#define GP_ARG_FIRST (GP_REG_FIRST + 4)
......@@ -2525,21 +2494,6 @@ typedef struct mips_args {
#define MAX_REGS_PER_ADDRESS 1
/* A C compound statement with a conditional `goto LABEL;' executed
if X (an RTX) is a legitimate memory address on the target
machine for a memory operand of mode MODE. */
#if 1
#define GO_PRINTF(x) fprintf(stderr, (x))
#define GO_PRINTF2(x,y) fprintf(stderr, (x), (y))
#define GO_DEBUG_RTX(x) debug_rtx(x)
#else
#define GO_PRINTF(x)
#define GO_PRINTF2(x,y)
#define GO_DEBUG_RTX(x)
#endif
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
......@@ -3361,14 +3315,6 @@ while (0)
#define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_ABICALLS && !TARGET_OLDABI)
#define DFMODE_NAN \
unsigned short DFbignan[4] = {0x7ff7, 0xffff, 0xffff, 0xffff}; \
unsigned short DFlittlenan[4] = {0xffff, 0xffff, 0xffff, 0xfff7}
#define SFMODE_NAN \
unsigned short SFbignan[2] = {0x7fbf, 0xffff}; \
unsigned short SFlittlenan[2] = {0xffff, 0xffbf}
/* Generate calls to memcpy, etc., not bcopy, etc. */
#define TARGET_MEM_FUNCTIONS
......
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