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lvzhengyang
riscv-gcc-1
Commits
cd2b33d0
Commit
cd2b33d0
authored
May 23, 2000
by
Nick Clifton
Committed by
Nick Clifton
May 23, 2000
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Plain Diff
Remove compile time warnings when building arm.o
From-SVN: r34114
parent
8ceaac3c
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Showing
6 changed files
with
90 additions
and
66 deletions
+90
-66
gcc/ChangeLog
+16
-0
gcc/config/arm/arm-protos.h
+22
-22
gcc/config/arm/arm.c
+45
-43
gcc/config/arm/arm.h
+1
-1
gcc/configure
+3
-0
gcc/configure.in
+3
-0
No files found.
gcc/ChangeLog
View file @
cd2b33d0
2000
-
05
-
23
Nick
Clifton
<
nickc
@cygnus
.
com
>
*
configure
.
in
:
Treat
'
strongarm
'
as
if
it
were
'
arm
'
when
determining
cpu
type
.
*
configure
:
Regenerate
.
*
config
/
arm
/
arm
.
c
:
Change
'
char
*
'
to
'
const
char
*
'
for
cases
where
constant
strings
are
involved
.
*
config
/
arm
/
arm
.
h
(
arm_condition_codes
)
:
Change
type
to
'
const
char
*
'
.
*
config
/
arm
/
arm
-
protos
.
h
:
Change
'
char
*
'
to
'
const
char
*
'
for
cases
where
constant
strings
are
involved
.
Tue
May
23
15
:
08
:
31
2000
Clinton
Popetz
<
cpopetz
@cygnus
.
com
>
*
config
/
sh
/
sh
.
c
(
gen_far_branch
,
split_branches
)
:
Update
gcc/config/arm/arm-protos.h
View file @
cd2b33d0
...
...
@@ -27,7 +27,7 @@ extern int arm_process_pragma PARAMS ((int (*)(void), void (*) (int),
char
*
));
extern
void
arm_finalize_pic
PARAMS
((
void
));
extern
int
arm_volatile_func
PARAMS
((
void
));
extern
char
*
arm_output_epilogue
PARAMS
((
int
));
extern
c
onst
c
har
*
arm_output_epilogue
PARAMS
((
int
));
extern
void
output_func_epilogue
PARAMS
((
int
));
extern
void
arm_expand_prologue
PARAMS
((
void
));
/* Used in arm.md, but defined in output.c. */
...
...
@@ -40,7 +40,7 @@ extern int arm_valid_machine_decl_attribute PARAMS ((tree, tree, tree));
extern
int
arm_comp_type_attributes
PARAMS
((
tree
,
tree
));
extern
int
arm_valid_type_attribute_p
PARAMS
((
tree
,
tree
,
tree
,
tree
));
extern
void
arm_set_default_type_attributes
PARAMS
((
tree
));
extern
void
arm_encode_call_attribute
PARAMS
((
tree
,
char
));
extern
void
arm_encode_call_attribute
PARAMS
((
tree
,
int
));
#endif
#ifdef RTX_CODE
extern
int
const_ok_for_arm
PARAMS
((
HOST_WIDE_INT
));
...
...
@@ -93,10 +93,10 @@ extern RTX_CODE minmax_code PARAMS ((rtx));
extern
int
adjacent_mem_locations
PARAMS
((
rtx
,
rtx
));
extern
int
load_multiple_sequence
PARAMS
((
rtx
*
,
int
,
int
*
,
int
*
,
HOST_WIDE_INT
*
));
extern
c
har
*
emit_ldm_seq
PARAMS
((
rtx
*
,
int
));
extern
c
onst
char
*
emit_ldm_seq
PARAMS
((
rtx
*
,
int
));
extern
int
store_multiple_sequence
PARAMS
((
rtx
*
,
int
,
int
*
,
int
*
,
HOST_WIDE_INT
*
));
extern
c
har
*
emit_stm_seq
PARAMS
((
rtx
*
,
int
));
extern
c
onst
char
*
emit_stm_seq
PARAMS
((
rtx
*
,
int
));
extern
rtx
arm_gen_load_multiple
PARAMS
((
int
,
int
,
rtx
,
int
,
int
,
int
,
int
,
int
));
extern
rtx
arm_gen_store_multiple
PARAMS
((
int
,
int
,
rtx
,
int
,
int
,
int
,
...
...
@@ -108,20 +108,20 @@ extern rtx arm_gen_compare_reg PARAMS ((RTX_CODE, rtx, rtx));
extern
void
arm_reload_in_hi
PARAMS
((
rtx
*
));
extern
void
arm_reload_out_hi
PARAMS
((
rtx
*
));
extern
void
arm_reorg
PARAMS
((
rtx
));
extern
c
har
*
fp_immediate_constant
PARAMS
((
rtx
));
extern
char
*
output_call
PARAMS
((
rtx
*
));
extern
c
har
*
output_call_mem
PARAMS
((
rtx
*
));
extern
char
*
output_mov_long_double_fpu_from_arm
PARAMS
((
rtx
*
));
extern
char
*
output_mov_long_double_arm_from_fpu
PARAMS
((
rtx
*
));
extern
char
*
output_mov_long_double_arm_from_arm
PARAMS
((
rtx
*
));
extern
char
*
output_mov_double_fpu_from_arm
PARAMS
((
rtx
*
));
extern
char
*
output_mov_double_arm_from_fpu
PARAMS
((
rtx
*
));
extern
char
*
output_move_double
PARAMS
((
rtx
*
));
extern
c
har
*
output_mov_immediate
PARAMS
((
rtx
*
));
extern
c
har
*
output_add_immediate
PARAMS
((
rtx
*
));
extern
c
har
*
arithmetic_instr
PARAMS
((
rtx
,
int
));
extern
c
onst
char
*
fp_immediate_constant
PARAMS
((
rtx
));
extern
c
onst
c
har
*
output_call
PARAMS
((
rtx
*
));
extern
c
onst
char
*
output_call_mem
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_mov_long_double_fpu_from_arm
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_mov_long_double_arm_from_fpu
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_mov_long_double_arm_from_arm
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_mov_double_fpu_from_arm
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_mov_double_arm_from_fpu
PARAMS
((
rtx
*
));
extern
c
onst
c
har
*
output_move_double
PARAMS
((
rtx
*
));
extern
c
onst
char
*
output_mov_immediate
PARAMS
((
rtx
*
));
extern
c
onst
char
*
output_add_immediate
PARAMS
((
rtx
*
));
extern
c
onst
char
*
arithmetic_instr
PARAMS
((
rtx
,
int
));
extern
void
output_ascii_pseudo_op
PARAMS
((
FILE
*
,
const
unsigned
char
*
,
int
));
extern
c
har
*
output_return_instruction
PARAMS
((
rtx
,
int
,
int
));
extern
c
onst
char
*
output_return_instruction
PARAMS
((
rtx
,
int
,
int
));
extern
void
arm_poke_function_name
PARAMS
((
FILE
*
,
char
*
));
extern
void
output_arm_prologue
PARAMS
((
FILE
*
,
int
));
extern
void
arm_print_operand
PARAMS
((
FILE
*
,
rtx
,
int
));
...
...
@@ -152,19 +152,19 @@ extern void aof_dump_imports PARAMS ((FILE *));
/* Thumb functions. */
extern
void
arm_init_expanders
PARAMS
((
void
));
extern
int
thumb_far_jump_used_p
PARAMS
((
int
));
extern
char
*
thumb_unexpanded_epilogue
PARAMS
((
void
));
extern
c
onst
c
har
*
thumb_unexpanded_epilogue
PARAMS
((
void
));
extern
void
thumb_expand_prologue
PARAMS
((
void
));
extern
void
thumb_expand_epilogue
PARAMS
((
void
));
#ifdef TREE_CODE
extern
int
is_called_in_ARM_mode
PARAMS
((
tree
));
#endif
#ifdef RTX_CODE
extern
int
thumb_shiftable_const
PARAMS
((
unsigned
HOST_WIDE_INT
));
extern
void
output_thumb_prologue
PARAMS
((
FILE
*
));
#ifdef RTX_CODE
extern
void
thumb_final_prescan_insn
PARAMS
((
rtx
));
extern
char
*
thumb_load_double_from_address
extern
c
onst
c
har
*
thumb_load_double_from_address
PARAMS
((
rtx
*
));
extern
void
output_thumb_prologue
PARAMS
((
FILE
*
));
extern
char
*
thumb_output_move_mem_multiple
extern
const
char
*
thumb_output_move_mem_multiple
PARAMS
((
int
,
rtx
*
));
extern
void
thumb_expand_movstrqi
PARAMS
((
rtx
*
));
extern
int
thumb_cmp_operand
PARAMS
((
rtx
,
enum
machine_mode
));
...
...
gcc/config/arm/arm.c
View file @
cd2b33d0
...
...
@@ -63,22 +63,22 @@ static int const_ok_for_op PARAMS ((Hint, enum rtx_code));
static
int
eliminate_lr2ip
PARAMS
((
rtx
*
));
static
rtx
emit_multi_reg_push
PARAMS
((
int
));
static
rtx
emit_sfm
PARAMS
((
int
,
int
));
static
c
har
*
fp_const_from_val
PARAMS
((
REAL_VALUE_TYPE
*
));
static
c
onst
char
*
fp_const_from_val
PARAMS
((
REAL_VALUE_TYPE
*
));
static
arm_cc
get_arm_condition_code
PARAMS
((
rtx
));
static
void
init_fpa_table
PARAMS
((
void
));
static
Hint
int_log2
PARAMS
((
Hint
));
static
rtx
is_jump_table
PARAMS
((
rtx
));
static
c
har
*
output_multi_immediate
PARAMS
((
rtx
*
,
char
*
,
char
*
,
int
,
Hint
));
static
void
print_multi_reg
PARAMS
((
FILE
*
,
char
*
,
int
,
int
,
int
));
static
c
onst
char
*
output_multi_immediate
PARAMS
((
rtx
*
,
const
char
*
,
const
char
*
,
int
,
Hint
));
static
void
print_multi_reg
PARAMS
((
FILE
*
,
c
onst
c
har
*
,
int
,
int
,
int
));
static
Mmode
select_dominance_cc_mode
PARAMS
((
rtx
,
rtx
,
Hint
));
static
c
har
*
shift_op
PARAMS
((
rtx
,
Hint
*
));
static
c
onst
char
*
shift_op
PARAMS
((
rtx
,
Hint
*
));
static
void
arm_init_machine_status
PARAMS
((
struct
function
*
));
static
void
arm_mark_machine_status
PARAMS
((
struct
function
*
));
static
int
number_of_first_bit_set
PARAMS
((
int
));
static
void
replace_symbols_in_block
PARAMS
((
tree
,
rtx
,
rtx
));
static
void
thumb_exit
PARAMS
((
FILE
*
,
int
,
rtx
));
static
void
thumb_pushpop
PARAMS
((
FILE
*
,
int
,
int
));
static
c
har
*
thumb_condition_code
PARAMS
((
rtx
,
int
));
static
c
onst
char
*
thumb_condition_code
PARAMS
((
rtx
,
int
));
static
rtx
is_jump_table
PARAMS
((
rtx
));
static
Hint
get_jump_table_size
PARAMS
((
rtx
));
static
Mnode
*
move_minipool_fix_forward_ref
PARAMS
((
Mnode
*
,
Mnode
*
,
Hint
));
...
...
@@ -202,7 +202,7 @@ rtx arm_target_insn;
int
arm_target_label
;
/* The condition codes of the ARM, and the inverse function. */
char
*
arm_condition_codes
[]
=
c
onst
c
har
*
arm_condition_codes
[]
=
{
"eq"
,
"ne"
,
"cs"
,
"cc"
,
"mi"
,
"pl"
,
"vs"
,
"vc"
,
"hi"
,
"ls"
,
"ge"
,
"lt"
,
"gt"
,
"le"
,
"al"
,
"nv"
...
...
@@ -214,7 +214,7 @@ char * arm_condition_codes[] =
struct
processors
{
c
har
*
name
;
c
onst
char
*
name
;
unsigned
int
flags
;
};
...
...
@@ -357,8 +357,8 @@ arm_override_options ()
unsigned
int
sought
;
static
struct
cpu_default
{
int
cpu
;
char
*
name
;
int
cpu
;
c
onst
c
har
*
name
;
}
cpu_defaults
[]
=
{
...
...
@@ -599,7 +599,7 @@ arm_override_options ()
&&
(
tune_flags
&
FL_MODE32
)
==
0
)
flag_schedule_insns
=
flag_schedule_insns_after_reload
=
0
;
arm_pr
og_
mode
=
TARGET_APCS_32
?
PROG_MODE_PROG32
:
PROG_MODE_PROG26
;
arm_pr
g
mode
=
TARGET_APCS_32
?
PROG_MODE_PROG32
:
PROG_MODE_PROG26
;
if
(
structure_size_string
!=
NULL
)
{
...
...
@@ -1704,7 +1704,7 @@ arm_comp_type_attributes (type1, type2)
void
arm_encode_call_attribute
(
decl
,
flag
)
tree
decl
;
char
flag
;
int
flag
;
{
const
char
*
str
=
XSTR
(
XEXP
(
DECL_RTL
(
decl
),
0
),
0
);
int
len
=
strlen
(
str
);
...
...
@@ -2455,7 +2455,7 @@ arm_adjust_cost (insn, link, dep, cost)
static
int
fpa_consts_inited
=
0
;
char
*
strings_fpa
[
8
]
=
static
const
char
*
strings_fpa
[
8
]
=
{
"0"
,
"1"
,
"2"
,
"3"
,
"4"
,
"5"
,
"0.5"
,
"10"
...
...
@@ -3472,7 +3472,7 @@ load_multiple_sequence (operands, nops, regs, base, load_offset)
||
const_ok_for_arm
(
-
unsorted_offsets
[
order
[
0
]]))
?
5
:
0
;
}
char
*
c
onst
c
har
*
emit_ldm_seq
(
operands
,
nops
)
rtx
*
operands
;
int
nops
;
...
...
@@ -3669,7 +3669,7 @@ store_multiple_sequence (operands, nops, regs, base, load_offset)
return
0
;
}
char
*
c
onst
c
har
*
emit_stm_seq
(
operands
,
nops
)
rtx
*
operands
;
int
nops
;
...
...
@@ -5611,7 +5611,7 @@ arm_reorg (first)
/* If the rtx is the correct value then return the string of the number.
In this way we can ensure that valid double constants are generated even
when cross compiling. */
char
*
c
onst
c
har
*
fp_immediate_constant
(
x
)
rtx
x
;
{
...
...
@@ -5630,7 +5630,7 @@ fp_immediate_constant (x)
}
/* As for fp_immediate_constant, but value is passed directly, not in rtx. */
static
char
*
static
c
onst
c
har
*
fp_const_from_val
(
r
)
REAL_VALUE_TYPE
*
r
;
{
...
...
@@ -5654,7 +5654,7 @@ fp_const_from_val (r)
static
void
print_multi_reg
(
stream
,
instr
,
reg
,
mask
,
hat
)
FILE
*
stream
;
char
*
instr
;
c
onst
c
har
*
instr
;
int
reg
;
int
mask
;
int
hat
;
...
...
@@ -5681,7 +5681,7 @@ print_multi_reg (stream, instr, reg, mask, hat)
/* Output a 'call' insn. */
char
*
c
onst
c
har
*
output_call
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5739,7 +5739,7 @@ eliminate_lr2ip (x)
/* Output a 'call' insn that is a reference in memory. */
char
*
c
onst
c
har
*
output_call_mem
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5768,7 +5768,7 @@ output_call_mem (operands)
OPERANDS[0] is an fpu register.
OPERANDS[1] is the first registers of an arm register pair. */
char
*
c
onst
c
har
*
output_mov_long_double_fpu_from_arm
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5792,7 +5792,7 @@ output_mov_long_double_fpu_from_arm (operands)
OPERANDS[0] is the first registers of an arm register pair.
OPERANDS[1] is an fpu register. */
char
*
c
onst
c
har
*
output_mov_long_double_arm_from_fpu
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5814,7 +5814,7 @@ output_mov_long_double_arm_from_fpu (operands)
/* Output a move from arm registers to arm registers of a long double
OPERANDS[0] is the destination.
OPERANDS[1] is the source. */
char
*
c
onst
c
har
*
output_mov_long_double_arm_from_arm
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5851,7 +5851,7 @@ output_mov_long_double_arm_from_arm (operands)
OPERANDS[0] is an fpu register.
OPERANDS[1] is the first registers of an arm register pair. */
char
*
c
onst
c
har
*
output_mov_double_fpu_from_arm
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5872,7 +5872,7 @@ output_mov_double_fpu_from_arm (operands)
OPERANDS[0] is the first registers of an arm register pair.
OPERANDS[1] is an fpu register. */
char
*
c
onst
c
har
*
output_mov_double_arm_from_fpu
(
operands
)
rtx
*
operands
;
{
...
...
@@ -5893,7 +5893,7 @@ output_mov_double_arm_from_fpu (operands)
It must be REG<-REG, REG<-CONST_DOUBLE, REG<-CONST_INT, REG<-MEM
or MEM<-REG and all MEMs must be offsettable addresses. */
char
*
c
onst
c
har
*
output_move_double
(
operands
)
rtx
*
operands
;
{
...
...
@@ -6129,7 +6129,7 @@ output_move_double (operands)
/* Output an arbitrary MOV reg, #n.
OPERANDS[0] is a register. OPERANDS[1] is a const_int. */
char
*
c
onst
c
har
*
output_mov_immediate
(
operands
)
rtx
*
operands
;
{
...
...
@@ -6170,7 +6170,7 @@ output_mov_immediate (operands)
/* Output an ADD r, s, #n where n may be too big for one instruction. If
adding zero to one register, output nothing. */
char
*
c
onst
c
har
*
output_add_immediate
(
operands
)
rtx
*
operands
;
{
...
...
@@ -6198,10 +6198,11 @@ output_add_immediate (operands)
IMMED_OP is the index of the constant slot in OPERANDS.
N is the constant value. */
static
char
*
static
c
onst
c
har
*
output_multi_immediate
(
operands
,
instr1
,
instr2
,
immed_op
,
n
)
rtx
*
operands
;
char
*
instr1
,
*
instr2
;
const
char
*
instr1
;
const
char
*
instr2
;
int
immed_op
;
HOST_WIDE_INT
n
;
{
...
...
@@ -6217,7 +6218,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
else
{
int
i
;
c
har
*
instr
=
instr1
;
c
onst
char
*
instr
=
instr1
;
/* Note that n is never zero here (which would give no output). */
for
(
i
=
0
;
i
<
32
;
i
+=
2
)
...
...
@@ -6231,6 +6232,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
}
}
}
return
""
;
}
...
...
@@ -6240,7 +6242,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
operation. SHIFT_FIRST_ARG is TRUE if the first argument of the operator
was shifted. */
char
*
c
onst
c
har
*
arithmetic_instr
(
op
,
shift_first_arg
)
rtx
op
;
int
shift_first_arg
;
...
...
@@ -6274,12 +6276,12 @@ arithmetic_instr (op, shift_first_arg)
On exit, *AMOUNTP will be -1 if the shift is by a register, or a constant
shift. */
static
char
*
static
c
onst
c
har
*
shift_op
(
op
,
amountp
)
rtx
op
;
HOST_WIDE_INT
*
amountp
;
{
char
*
mnem
;
c
onst
c
har
*
mnem
;
enum
rtx_code
code
=
GET_CODE
(
op
);
if
(
GET_CODE
(
XEXP
(
op
,
1
))
==
REG
||
GET_CODE
(
XEXP
(
op
,
1
))
==
SUBREG
)
...
...
@@ -6447,7 +6449,7 @@ output_ascii_pseudo_op (stream, p, len)
}
char
*
c
onst
c
har
*
output_return_instruction
(
operand
,
really_return
,
reverse
)
rtx
operand
;
int
really_return
;
...
...
@@ -6732,7 +6734,7 @@ output_arm_prologue (f, frame_size)
#endif
}
char
*
c
onst
c
har
*
arm_output_epilogue
(
really_return
)
int
really_return
;
{
...
...
@@ -7398,7 +7400,7 @@ arm_print_operand (stream, x, code)
case
'S'
:
{
HOST_WIDE_INT
val
;
char
*
shift
=
shift_op
(
x
,
&
val
);
c
onst
c
har
*
shift
=
shift_op
(
x
,
&
val
);
if
(
shift
)
{
...
...
@@ -8041,7 +8043,7 @@ arm_debugger_arg_offset (value, addr)
/* If we are using the frame pointer to point at the argument, then
an offset of 0 is correct. */
if
(
REGNO
(
addr
)
==
HARD_FRAME_POINTER_REGNUM
)
if
(
REGNO
(
addr
)
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
)
return
0
;
/* If we are using the stack pointer to point at the
...
...
@@ -8087,7 +8089,7 @@ arm_debugger_arg_offset (value, addr)
&&
REGNO
(
XEXP
(
PATTERN
(
insn
),
0
))
==
REGNO
(
addr
)
&&
GET_CODE
(
XEXP
(
PATTERN
(
insn
),
1
))
==
PLUS
&&
GET_CODE
(
XEXP
(
XEXP
(
PATTERN
(
insn
),
1
),
0
))
==
REG
&&
REGNO
(
XEXP
(
XEXP
(
PATTERN
(
insn
),
1
),
0
))
==
HARD_FRAME_POINTER_REGNUM
&&
REGNO
(
XEXP
(
XEXP
(
PATTERN
(
insn
),
1
),
0
))
==
(
unsigned
)
HARD_FRAME_POINTER_REGNUM
&&
GET_CODE
(
XEXP
(
XEXP
(
PATTERN
(
insn
),
1
),
1
))
==
CONST_INT
)
{
...
...
@@ -8635,7 +8637,7 @@ is_called_in_ARM_mode (func)
}
/* The bits which aren't usefully expanded as rtl. */
char
*
c
onst
c
har
*
thumb_unexpanded_epilogue
()
{
int
regno
;
...
...
@@ -9250,7 +9252,7 @@ output_thumb_prologue (f)
a computed memory address. The computed address may involve a
register which is overwritten by the load. */
char
*
c
onst
c
har
*
thumb_load_double_from_address
(
operands
)
rtx
*
operands
;
{
...
...
@@ -9376,7 +9378,7 @@ thumb_load_double_from_address (operands)
}
char
*
c
onst
c
har
*
thumb_output_move_mem_multiple
(
n
,
operands
)
int
n
;
rtx
*
operands
;
...
...
@@ -9490,12 +9492,12 @@ thumb_cmp_operand (op, mode)
||
register_operand
(
op
,
mode
));
}
static
char
*
static
c
onst
c
har
*
thumb_condition_code
(
x
,
invert
)
rtx
x
;
int
invert
;
{
static
char
*
conds
[]
=
static
c
onst
c
har
*
conds
[]
=
{
"eq"
,
"ne"
,
"cs"
,
"cc"
,
"mi"
,
"pl"
,
"vs"
,
"vc"
,
"hi"
,
"ls"
,
"ge"
,
"lt"
,
"gt"
,
"le"
...
...
gcc/config/arm/arm.h
View file @
cd2b33d0
...
...
@@ -59,7 +59,7 @@ typedef enum arm_cond_code
arm_cc
;
extern
arm_cc
arm_current_cc
;
extern
char
*
arm_condition_codes
[];
extern
c
onst
c
har
*
arm_condition_codes
[];
#define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1))
...
...
gcc/configure
View file @
cd2b33d0
...
...
@@ -3437,6 +3437,9 @@ for machine in $build $host $target; do
alpha
*
-
*
-
*
)
cpu_type
=
alpha
;;
strongarm
*
-
*
-
*
)
cpu_type
=
arm
;;
arm
*
-
*
-
*
)
cpu_type
=
arm
;;
...
...
gcc/configure.in
View file @
cd2b33d0
...
...
@@ -566,6 +566,9 @@ for machine in $build $host $target; do
alpha*-*-*)
cpu_type=alpha
;;
strongarm*-*-*)
cpu_type=arm
;;
arm*-*-*)
cpu_type=arm
;;
...
...
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