re PR rtl-optimization/56605 (Redundant branch introduced during loop2 phases)

gcc:

2013-03-13  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	    Steven Bosscher <steven@gcc.gnu.org>

	PR rtl-optimization/56605
	* loop-iv.c (implies_p): Handle equal RTXs and subregs.

gcc/testsuite:

2013-03-13  Bill Schmidt  wschmidt@linux.vnet.ibm.com>

	PR rtl-optimization/56605
	* gcc.target/powerpc/pr56605.c: New.

Co-Authored-By: Steven Bosscher <steven@gcc.gnu.org>

From-SVN: r196823

gcc/ChangeLog

+2013-03-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+	    Steven Bosscher <steven@gcc.gnu.org>
+
+	PR rtl-optimization/56605
+	* loop-iv.c (implies_p): Handle equal RTXs and subregs.
+
 2013-03-20  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR bootstrap/56656

gcc/loop-iv.c

@@ -1496,19 +1496,26 @@ implies_p (rtx a, rtx b)
   rtx op0, op1, opb0, opb1, r;
   enum machine_mode mode;
 
+  if (rtx_equal_p (a, b))
+    return true;
+
   if (GET_CODE (a) == EQ)
     {
       op0 = XEXP (a, 0);
       op1 = XEXP (a, 1);
 
-      if (REG_P (op0))
+      if (REG_P (op0)
+	  || (GET_CODE (op0) == SUBREG
+	      && REG_P (SUBREG_REG (op0))))
 	{
 	  r = simplify_replace_rtx (b, op0, op1);
 	  if (r == const_true_rtx)
 	    return true;
 	}
 
-      if (REG_P (op1))
+      if (REG_P (op1)
+	  || (GET_CODE (op1) == SUBREG
+	      && REG_P (SUBREG_REG (op1))))
 	{
 	  r = simplify_replace_rtx (b, op1, op0);
 	  if (r == const_true_rtx)

gcc/testsuite/ChangeLog

+2013-03-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	PR rtl-optimization/56605
+	* gcc.target/powerpc/pr56605.c: New.
+
 2013-03-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
 	PR fortran/54932

gcc/testsuite/gcc.target/powerpc/pr56605.c

+/* PR rtl-optimization/56605 */
+/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
+/* { dg-options "-O3 -mvsx -mcpu=power7 -fno-unroll-loops -fdump-rtl-loop2_doloop" } */
+
+void foo (short* __restrict sb, int* __restrict ia)
+{
+  int i;
+  for (i = 0; i < 4000; i++)
+    ia[i] = (int) sb[i];
+}
+
+/* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\(subreg:SI \\\(reg:DI" 1 "loop2_doloop" } } */
+/* { dg-final { cleanup-rtl-dump "loop2_doloop" } } */