Commit cc14227f by Richard Sandiford Committed by Richard Sandiford

reload.h (target_reload): Add x_cached_reg_save_code and x_cached_reg_restore_code.

gcc/
	* reload.h (target_reload): Add x_cached_reg_save_code and
	x_cached_reg_restore_code.
	* caller-save.c (cached_reg_save_code, cached_reg_restore_code):
	Redefine as macros.

From-SVN: r162106
parent fa19795e
2010-07-12 Richard Sandiford <rdsandiford@googlemail.com> 2010-07-12 Richard Sandiford <rdsandiford@googlemail.com>
* reload.h (target_reload): Add x_cached_reg_save_code and
x_cached_reg_restore_code.
* caller-save.c (cached_reg_save_code, cached_reg_restore_code):
Redefine as macros.
2010-07-12 Richard Sandiford <rdsandiford@googlemail.com>
* Makefile.in (target-globals.o): Depend on builtins.h. * Makefile.in (target-globals.o): Depend on builtins.h.
* builtins.h: New file. * builtins.h: New file.
* builtins.c: Include builtins.h. * builtins.c: Include builtins.h.
......
...@@ -45,6 +45,10 @@ along with GCC; see the file COPYING3. If not see ...@@ -45,6 +45,10 @@ along with GCC; see the file COPYING3. If not see
#define regno_save_mode \ #define regno_save_mode \
(this_target_reload->x_regno_save_mode) (this_target_reload->x_regno_save_mode)
#define cached_reg_save_code \
(this_target_reload->x_cached_reg_save_code)
#define cached_reg_restore_code \
(this_target_reload->x_cached_reg_restore_code)
/* For each hard register, a place on the stack where it can be saved, /* For each hard register, a place on the stack where it can be saved,
if needed. */ if needed. */
...@@ -58,17 +62,6 @@ static int save_slots_num; ...@@ -58,17 +62,6 @@ static int save_slots_num;
/* Allocated slots so far. */ /* Allocated slots so far. */
static rtx save_slots[FIRST_PSEUDO_REGISTER]; static rtx save_slots[FIRST_PSEUDO_REGISTER];
/* We will only make a register eligible for caller-save if it can be
saved in its widest mode with a simple SET insn as long as the memory
address is valid. We record the INSN_CODE is those insns here since
when we emit them, the addresses might not be valid, so they might not
be recognized. */
static int
cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
static int
cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
/* Set of hard regs currently residing in save area (during insn scan). */ /* Set of hard regs currently residing in save area (during insn scan). */
static HARD_REG_SET hard_regs_saved; static HARD_REG_SET hard_regs_saved;
......
...@@ -182,6 +182,14 @@ struct target_reload { ...@@ -182,6 +182,14 @@ struct target_reload {
enum machine_mode (x_regno_save_mode enum machine_mode (x_regno_save_mode
[FIRST_PSEUDO_REGISTER] [FIRST_PSEUDO_REGISTER]
[MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]); [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
/* We will only make a register eligible for caller-save if it can be
saved in its widest mode with a simple SET insn as long as the memory
address is valid. We record the INSN_CODE is those insns here since
when we emit them, the addresses might not be valid, so they might not
be recognized. */
int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
}; };
extern struct target_reload default_target_reload; extern struct target_reload default_target_reload;
......
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