Commit cb77b6cf by H.J. Lu Committed by H.J. Lu

Remove -mfused-madd and add -mfma.

2011-07-13  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/invoke.texi (x86): Remove -mfused-madd and add -mfma.

From-SVN: r176230
parent 36fc3799
2011-07-13 H.J. Lu <hongjiu.lu@intel.com>
* doc/invoke.texi (x86): Remove -mfused-madd and add -mfma.
2011-07-13 Richard Sandiford <richard.sandiford@linaro.org> 2011-07-13 Richard Sandiford <richard.sandiford@linaro.org>
* tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): Tighten * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): Tighten
......
...@@ -600,7 +600,7 @@ Objective-C and Objective-C++ Dialects}. ...@@ -600,7 +600,7 @@ Objective-C and Objective-C++ Dialects}.
-mincoming-stack-boundary=@var{num} @gol -mincoming-stack-boundary=@var{num} @gol
-mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol
-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol -mthreads -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
...@@ -12587,6 +12587,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. ...@@ -12587,6 +12587,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@itemx -mno-rdrnd @itemx -mno-rdrnd
@itemx -mf16c @itemx -mf16c
@itemx -mno-f16c @itemx -mno-f16c
@itemx -mfma
@itemx -mno-fma
@itemx -msse4a @itemx -msse4a
@itemx -mno-sse4a @itemx -mno-sse4a
@itemx -mfma4 @itemx -mfma4
...@@ -12612,9 +12614,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. ...@@ -12612,9 +12614,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@opindex mno-sse @opindex mno-sse
@opindex m3dnow @opindex m3dnow
@opindex mno-3dnow @opindex mno-3dnow
These switches enable or disable the use of instructions in the MMX, These switches enable or disable the use of instructions in the MMX, SSE,
SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA,
F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets. SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
These extensions are also available as built-in functions: see These extensions are also available as built-in functions: see
@ref{X86 Built-in Functions}, for details of the functions enabled and @ref{X86 Built-in Functions}, for details of the functions enabled and
disabled by these switches. disabled by these switches.
...@@ -12633,13 +12635,6 @@ supported architecture, using the appropriate flags. In particular, ...@@ -12633,13 +12635,6 @@ supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without the file containing the CPU detection code should be compiled without
these options. these options.
@item -mfused-madd
@itemx -mno-fused-madd
@opindex mfused-madd
@opindex mno-fused-madd
Do (don't) generate code that uses the fused multiply/add or multiply/subtract
instructions. The default is to use these instructions.
@item -mcld @item -mcld
@opindex mcld @opindex mcld
This option instructs GCC to emit a @code{cld} instruction in the prologue This option instructs GCC to emit a @code{cld} instruction in the prologue
......
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