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riscv-gcc-1
Commit c9d3aede by Uros Bizjak Committed by Uros Bizjak
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re PR target/20421 (387 mode switching clobbers flags) 

	PR target/20421
	* config/i386/i386.md (frndintxf2_floor, frndintxf2_ceil)
	(frndintxf2_trunc, frndintxf2_mask_pm): Add FLAGS_REG clobber.
	Allocate local stack slots here.  Set ix86_optimize_mode_switching.
	flag here. Implement using define_insn_and_split.
	(frndintxf2_floor_i387, frndintxf2_ceil_i387, frndintxf2_trunc_i387)
	(frndintxf2_mask_pm_i387): New insn patterns.
	(floorsf2, floordf2, floorxf2): Remove local stack slot allocations.
	Do not set ix86_optimize_mode_switching flag.
	(ceilsf2, ceildf2, ceilxf2): Same.
	(btruncsf2, btruncdf2, btruncxf2): Same.
	(nearbyintsf2, nearbyintdf2, nearbyintxf2): Same.

From-SVN: r97604
parent 3ce9c824
Showing with 154 additions and 87 deletions
gcc/ChangeLog
2005-04-05 Uros Bizjak <uros@kss-loka.si>
PR target/20421
* config/i386/i386.md (frndintxf2_floor, frndintxf2_ceil)
(frndintxf2_trunc, frndintxf2_mask_pm): Add FLAGS_REG clobber.
Allocate local stack slots here. Set ix86_optimize_mode_switching.
flag here. Implement using define_insn_and_split.
(frndintxf2_floor_i387, frndintxf2_ceil_i387, frndintxf2_trunc_i387)
(frndintxf2_mask_pm_i387): New insn patterns.
(floorsf2, floordf2, floorxf2): Remove local stack slot allocations.
Do not set ix86_optimize_mode_switching flag.
(ceilsf2, ceildf2, ceilxf2): Same.
(btruncsf2, btruncdf2, btruncxf2): Same.
(nearbyintsf2, nearbyintdf2, nearbyintxf2): Same.
2005-04-05 Ian Lance Taylor <ian@airs.com> 2005-04-05 Ian Lance Taylor <ian@airs.com>
PR debug/9963 PR debug/9963
......
gcc/config/i386/i386.md
...@@ -16367,7 +16367,33 @@ ...@@ -16367,7 +16367,33 @@
DONE; DONE;
}) })
(define_insn "frndintxf2_floor" ;; Rounding mode control word calculation could clobber FLAGS_REG.
(define_insn_and_split "frndintxf2_floor"
[(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_FLOOR))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
"#"
"&& 1"
[(const_int 0)]
{
ix86_optimize_mode_switching = 1;
operands[2] = assign_386_stack_local (HImode, 1);
operands[3] = assign_386_stack_local (HImode, 2);
emit_insn (gen_frndintxf2_floor_i387 (operands[0], operands[1],
operands[2], operands[3]));
DONE;
}
[(set_attr "type" "frndint")
(set_attr "i387_cw" "floor")
(set_attr "mode" "XF")])
(define_insn "frndintxf2_floor_i387"
[(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] (unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_FLOOR)) UNSPEC_FRNDINT_FLOOR))
...@@ -16380,6 +16406,16 @@ ...@@ -16380,6 +16406,16 @@
(set_attr "i387_cw" "floor") (set_attr "i387_cw" "floor")
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_expand "floorxf2"
[(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
{
emit_insn (gen_frndintxf2_floor (operands[0], operands[1]));
DONE;
})
(define_expand "floordf2" (define_expand "floordf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
...@@ -16389,13 +16425,9 @@ ...@@ -16389,13 +16425,9 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extenddfxf2 (op1, operands[1])); emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_floor (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_floor (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
DONE; DONE;
...@@ -16410,34 +16442,41 @@ ...@@ -16410,34 +16442,41 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extendsfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_floor (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_floor (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
DONE; DONE;
}) })
(define_expand "floorxf2" ;; Rounding mode control word calculation could clobber FLAGS_REG.
[(use (match_operand:XF 0 "register_operand" "")) (define_insn_and_split "frndintxf2_ceil"
(use (match_operand:XF 1 "register_operand" ""))] [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_CEIL))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
"#"
"&& 1"
[(const_int 0)]
{ {
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1; ix86_optimize_mode_switching = 1;
emit_insn (gen_frndintxf2_floor (operands[0], operands[1], op2, op3)); operands[2] = assign_386_stack_local (HImode, 1);
operands[3] = assign_386_stack_local (HImode, 2);
emit_insn (gen_frndintxf2_ceil_i387 (operands[0], operands[1],
operands[2], operands[3]));
DONE; DONE;
}) }
[(set_attr "type" "frndint")
(set_attr "i387_cw" "ceil")
(set_attr "mode" "XF")])
(define_insn "frndintxf2_ceil" (define_insn "frndintxf2_ceil_i387"
[(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] (unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_CEIL)) UNSPEC_FRNDINT_CEIL))
...@@ -16450,6 +16489,16 @@ ...@@ -16450,6 +16489,16 @@
(set_attr "i387_cw" "ceil") (set_attr "i387_cw" "ceil")
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_expand "ceilxf2"
[(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
{
emit_insn (gen_frndintxf2_ceil (operands[0], operands[1]));
DONE;
})
(define_expand "ceildf2" (define_expand "ceildf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
...@@ -16459,13 +16508,9 @@ ...@@ -16459,13 +16508,9 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extenddfxf2 (op1, operands[1])); emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_ceil (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_ceil (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
DONE; DONE;
...@@ -16480,34 +16525,41 @@ ...@@ -16480,34 +16525,41 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extendsfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_ceil (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_ceil (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
DONE; DONE;
}) })
(define_expand "ceilxf2" ;; Rounding mode control word calculation could clobber FLAGS_REG.
[(use (match_operand:XF 0 "register_operand" "")) (define_insn_and_split "frndintxf2_trunc"
(use (match_operand:XF 1 "register_operand" ""))] [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_TRUNC))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
"#"
"&& 1"
[(const_int 0)]
{ {
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1; ix86_optimize_mode_switching = 1;
emit_insn (gen_frndintxf2_ceil (operands[0], operands[1], op2, op3)); operands[2] = assign_386_stack_local (HImode, 1);
operands[3] = assign_386_stack_local (HImode, 2);
emit_insn (gen_frndintxf2_trunc_i387 (operands[0], operands[1],
operands[2], operands[3]));
DONE; DONE;
}) }
[(set_attr "type" "frndint")
(set_attr "i387_cw" "trunc")
(set_attr "mode" "XF")])
(define_insn "frndintxf2_trunc" (define_insn "frndintxf2_trunc_i387"
[(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] (unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_TRUNC)) UNSPEC_FRNDINT_TRUNC))
...@@ -16520,6 +16572,16 @@ ...@@ -16520,6 +16572,16 @@
(set_attr "i387_cw" "trunc") (set_attr "i387_cw" "trunc")
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_expand "btruncxf2"
[(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
{
emit_insn (gen_frndintxf2_trunc (operands[0], operands[1]));
DONE;
})
(define_expand "btruncdf2" (define_expand "btruncdf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
...@@ -16529,13 +16591,9 @@ ...@@ -16529,13 +16591,9 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extenddfxf2 (op1, operands[1])); emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_trunc (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_trunc (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
DONE; DONE;
...@@ -16550,34 +16608,41 @@ ...@@ -16550,34 +16608,41 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extendsfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_trunc (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_trunc (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
DONE; DONE;
}) })
(define_expand "btruncxf2" ;; Rounding mode control word calculation could clobber FLAGS_REG.
[(use (match_operand:XF 0 "register_operand" "")) (define_insn_and_split "frndintxf2_mask_pm"
(use (match_operand:XF 1 "register_operand" ""))] [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_MASK_PM))
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
"#"
"&& 1"
[(const_int 0)]
{ {
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1; ix86_optimize_mode_switching = 1;
emit_insn (gen_frndintxf2_trunc (operands[0], operands[1], op2, op3)); operands[2] = assign_386_stack_local (HImode, 1);
operands[3] = assign_386_stack_local (HImode, 2);
emit_insn (gen_frndintxf2_mask_pm_i387 (operands[0], operands[1],
operands[2], operands[3]));
DONE; DONE;
}) }
[(set_attr "type" "frndint")
(set_attr "i387_cw" "mask_pm")
(set_attr "mode" "XF")])
(define_insn "frndintxf2_mask_pm" (define_insn "frndintxf2_mask_pm_i387"
[(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] (unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT_MASK_PM)) UNSPEC_FRNDINT_MASK_PM))
...@@ -16590,6 +16655,17 @@ ...@@ -16590,6 +16655,17 @@
(set_attr "i387_cw" "mask_pm") (set_attr "i387_cw" "mask_pm")
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_expand "nearbyintxf2"
[(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
{
emit_insn (gen_frndintxf2_mask_pm (operands[0], operands[1]));
DONE;
})
(define_expand "nearbyintdf2" (define_expand "nearbyintdf2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:DF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:DF 1 "register_operand" ""))]
...@@ -16599,13 +16675,9 @@ ...@@ -16599,13 +16675,9 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extenddfxf2 (op1, operands[1])); emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_mask_pm (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_mask_pm (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
DONE; DONE;
...@@ -16620,34 +16692,14 @@ ...@@ -16620,34 +16692,14 @@
{ {
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extendsfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2_mask_pm (op0, op1, op2, op3)); emit_insn (gen_frndintxf2_mask_pm (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0));
DONE; DONE;
}) })
(define_expand "nearbyintxf2"
[(use (match_operand:XF 0 "register_operand" ""))
(use (match_operand:XF 1 "register_operand" ""))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations"
{
rtx op2 = assign_386_stack_local (HImode, 1);
rtx op3 = assign_386_stack_local (HImode, 2);
ix86_optimize_mode_switching = 1;
emit_insn (gen_frndintxf2_mask_pm (operands[0], operands[1],
op2, op3));
DONE;
})
;; Block operation instructions ;; Block operation instructions
......
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