Commit c8730d93 by Jeffrey A Law Committed by Jeff Law

* invoke.texi (HPPA Options): Remove -mspace/-mno-space.

From-SVN: r28126
parent 7123b6ed
Fri Jul 16 13:48:09 1999 Jeffrey A Law (law@cygnus.com) Fri Jul 16 13:48:09 1999 Jeffrey A Law (law@cygnus.com)
* invoke.texi (HPPA Options): Remove -mspace/-mno-space.
* pa.c (out_of_line_prologue_epilogue): Delete. * pa.c (out_of_line_prologue_epilogue): Delete.
(override_options): Remove -mspace related code. (override_options): Remove -mspace related code.
(hppa_expand_prologue, hppa_expand_epilogue): Likewise. (hppa_expand_prologue, hppa_expand_epilogue): Likewise.
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...@@ -356,10 +356,10 @@ in the following sections. ...@@ -356,10 +356,10 @@ in the following sections.
-mlong-load-store -mno-big-switch -mno-disable-fpregs -mlong-load-store -mno-big-switch -mno-disable-fpregs
-mno-disable-indexing -mno-fast-indirect-calls -mno-gas -mno-disable-indexing -mno-fast-indirect-calls -mno-gas
-mno-jump-in-delay -mno-long-load-store -mno-jump-in-delay -mno-long-load-store
-mno-portable-runtime -mno-soft-float -mno-space -mno-portable-runtime -mno-soft-float
-mno-space-regs -msoft-float -mpa-risc-1-0 -mno-space-regs -msoft-float -mpa-risc-1-0
-mpa-risc-1-1 -mpa-risc-2-0 -mportable-runtime -mpa-risc-1-1 -mpa-risc-2-0 -mportable-runtime
-mschedule=@var{cpu type} -mspace -mspace-regs -mschedule=@var{cpu type} -mspace-regs
@emph{Intel 960 Options} @emph{Intel 960 Options}
-m@var{cpu type} -masm-compat -mclean-linkage -m@var{cpu type} -masm-compat -mclean-linkage
...@@ -5739,11 +5739,6 @@ allows GCC to emit code which performs faster indirect calls. ...@@ -5739,11 +5739,6 @@ allows GCC to emit code which performs faster indirect calls.
This option will not work in the presense of shared libraries or nested This option will not work in the presense of shared libraries or nested
functions. functions.
@item -mspace
Optimize for space rather than execution time. Currently this only
enables out of line function prologues and epilogues. This option is
incompatible with PIC code generation and profiling.
@item -mlong-load-store @item -mlong-load-store
Generate 3-instruction load and store sequences as sometimes required by Generate 3-instruction load and store sequences as sometimes required by
the HP-UX 10 linker. This is equivalent to the @samp{+k} option to the HP-UX 10 linker. This is equivalent to the @samp{+k} option to
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