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Commit c769a35d by Richard Earnshaw
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arm.c (arm_rtx_costs_1, [...]): Adjust costs for comparing a constant with small… 

arm.c (arm_rtx_costs_1, [...]): Adjust costs for comparing a constant with small negative numbers and add...

* arm.c (arm_rtx_costs_1, case TARGET_THUMB): Adjust costs for
comparing a constant with small negative numbers and add costing
for constants in conjunction with AND.
(note_invalid_constants): Tidy previous change.
(thumb_cmp_operand): Tidy.
(thumb_cmpneg_operand): New function.
* arm.h (CONDITIONAL_REGISTER_USAGE): Don't use HI regs if optimizing
for size.
(FIRST_LO_REGNUM, FIRST_HI_REGNUM, LAST_HI_REGNUM): Define.
(PREDICATE_CODES): Add thumb_cmpneg_operand.
* arm.md (cbranchsi4): Convert to define_expand.  Handle comparison
with a negative constant.
(cbranchsi4_insn): Matcher for cbranchsi4.
(cbranchsi4_scratch): Similar, but a scratch is available for
handling negative constants.
(movsi_cbranchsi4): New pattern.
(tstsi3_cbranch): Renamed from andsi3_cbranch_scratch, remove scratch
and use the TST instruction.
(andsi3_cbranch, orrsi3_cbranch, xorsi3_cbranch, cbranchne_decr1)
(addsi3_cbranch, subsi3_cbranch): Ensure that register preferencing
cannot see high regs or memory alternatives.
(bicsi3_cbranch_scratch, bicsi3_cbranch): New patterns.

From-SVN: r72885
parent c21dbe85
Showing with 60 additions and 12 deletions
gcc/ChangeLog
2003-10-24 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_rtx_costs_1, case TARGET_THUMB): Adjust costs for
comparing a constant with small negative numbers and add costing
for constants in conjunction with AND.
(note_invalid_constants): Tidy previous change.
(thumb_cmp_operand): Tidy.
(thumb_cmpneg_operand): New function.
* arm.h (CONDITIONAL_REGISTER_USAGE): Don't use HI regs if optimizing
for size.
(FIRST_LO_REGNUM, FIRST_HI_REGNUM, LAST_HI_REGNUM): Define.
(PREDICATE_CODES): Add thumb_cmpneg_operand.
* arm.md (cbranchsi4): Convert to define_expand. Handle comparison
with a negative constant.
(cbranchsi4_insn): Matcher for cbranchsi4.
(cbranchsi4_scratch): Similar, but a scratch is available for
handling negative constants.
(movsi_cbranchsi4): New pattern.
(tstsi3_cbranch): Renamed from andsi3_cbranch_scratch, remove scratch
and use the TST instruction.
(andsi3_cbranch, orrsi3_cbranch, xorsi3_cbranch, cbranchne_decr1)
(addsi3_cbranch, subsi3_cbranch): Ensure that register preferencing
cannot see high regs or memory alternatives.
(bicsi3_cbranch_scratch, bicsi3_cbranch): New patterns.
2003-10-24 Richard Earnshaw <rearnsha@arm.com>
* arm.c (note_invalid_constants): Try to extract the constant
pool value using avoid_constant_pool_reference; only use
get_pool_constant if that returns the original reference.
......@@ -119,8 +144,10 @@
2003-10-22 Jan Hubicka <jh@suse.cz>
* dwarf2out.c (dwarf2out_abstract_function): Use DW_AT to check presence of DW_AT_inline.
(gen_subprogram_die): Likewise; do not abort instead of emitting DW_AT_not_inline
* dwarf2out.c (dwarf2out_abstract_function): Use DW_AT to check
presence of DW_AT_inline.
(gen_subprogram_die): Likewise; do not abort instead of emitting
DW_AT_not_inline.
2003-10-22 Jan Hubicka <jh@suse.cz>
......
gcc/config/arm/arm.c
......@@ -3131,12 +3131,12 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
return COSTS_N_INSNS (2);
return COSTS_N_INSNS (3);
}
else if (outer == PLUS
else if ((outer == PLUS || outer == COMPARE)
&& INTVAL (x) < 256 && INTVAL (x) > -256)
return 0;
else if (outer == COMPARE
&& (unsigned HOST_WIDE_INT) INTVAL (x) < 256)
return 0;
else if (outer == AND
&& INTVAL (x) < 256 && INTVAL (x) >= -256)
return COSTS_N_INSNS (1);
else if (outer == ASHIFT || outer == ASHIFTRT
|| outer == LSHIFTRT)
return 0;
......@@ -6903,13 +6903,11 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
us here. Lets just hope that we can use the
constant pool value directly. */
if (op == cop)
op = get_pool_constant (XEXP (op, 0));
else
op = cop;
cop = get_pool_constant (XEXP (op, 0));
push_minipool_fix (insn, address,
recog_data.operand_loc[opno],
recog_data.operand_mode[opno], op);
recog_data.operand_mode[opno], cop);
}
result = true;
......@@ -12647,10 +12645,19 @@ int
thumb_cmp_operand (rtx op, enum machine_mode mode)
{
return ((GET_CODE (op) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (op)) < 256)
&& INTVAL (op) < 256
&& INTVAL (op) >= 0)
|| s_register_operand (op, mode));
}
int
thumb_cmpneg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return (GET_CODE (op) == CONST_INT
&& INTVAL (op) < 0
&& INTVAL (op) > -256);
}
/* Return TRUE if a result can be stored in OP without clobbering the
condition code register. Prior to reload we only accept a
register. After reload we have to be able to handle memory as
......
gcc/config/arm/arm.h
......@@ -949,6 +949,16 @@ extern const char * structure_size_string;
fixed_regs[regno] = call_used_regs[regno] = 1; \
} \
\
if (TARGET_THUMB && optimize_size) \
{ \
/* When optimizing for size, it's better not to use \
the HI regs, because of the overhead of stacking \
them. */ \
for (regno = FIRST_HI_REGNUM; \
regno <= LAST_HI_REGNUM; ++regno) \
fixed_regs[regno] = call_used_regs[regno] = 1; \
} \
\
if (TARGET_CIRRUS) \
{ \
for (regno = FIRST_ARM_FP_REGNUM; \
......@@ -1055,8 +1065,11 @@ extern const char * structure_size_string;
/* The number of the last argument register. */
#define LAST_ARG_REGNUM ARG_REGISTER (NUM_ARG_REGS)
/* The number of the last "lo" register (thumb). */
/* The numbers of the Thumb register ranges. */
#define FIRST_LO_REGNUM 0
#define LAST_LO_REGNUM 7
#define FIRST_HI_REGNUM 8
#define LAST_HI_REGNUM 11
/* The register that holds the return address in exception handlers. */
#define EXCEPTION_LR_REGNUM 2
......@@ -2693,6 +2706,7 @@ extern int making_const_table;
{"reg_or_int_operand", {SUBREG, REG, CONST_INT}}, \
{"index_operand", {SUBREG, REG, CONST_INT}}, \
{"thumb_cmp_operand", {SUBREG, REG, CONST_INT}}, \
{"thumb_cmpneg_operand", {CONST_INT}}, \
{"thumb_cbrch_target_operand", {SUBREG, REG, MEM}}, \
{"offsettable_memory_operand", {MEM}}, \
{"bad_signed_byte_operand", {MEM}}, \
......
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