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Commit c5059423 by Alan Modra Committed by Alan Modra
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rs6000.c (mask_operand): Rewrite without bit-shifting loop. 

	* config/rs6000/rs6000.c (mask_operand): Rewrite without
	bit-shifting loop.
	(mask64_operand): Likewise.
	(rldic_operand): Delete.
	(includes_lshift64_p): Delete.
	(includes_rldic_lshift_p): New function.
	(includes_rldicr_lshift_p): New function.
	(print_operand): Don't call rldic_operand in case 'W'.
	* config/rs6000/rs6000-protos.h (rldic_operand): Remove.
	(includes_lshift64_p): Remove.
	(includes_rldic_lshift_p): Declare.
	(includes_rldicr_lshift_p): Declare.
	* config/rs6000/rs6000.h (PREDICATE_CODES): Remove rldic_operand.
	* config/rs6000/rs6000.md <ashldi3_internal 64 bit patterns>:
	Replace match_operand rldic_operand predicate with
	const_int_operand.  Replace includes_lshift64_p condition with
	includes_rldic_lshift_p.
	<ashldi3_internal 64 bit rldicr patterns>: New.

From-SVN: r45192
parent c34cce44
Showing with 312 additions and 153 deletions
gcc/ChangeLog
2001-08-27 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.c (mask_operand): Rewrite without
bit-shifting loop.
(mask64_operand): Likewise.
(rldic_operand): Delete.
(includes_lshift64_p): Delete.
(includes_rldic_lshift_p): New function.
(includes_rldicr_lshift_p): New function.
(print_operand): Don't call rldic_operand in case 'W'.
* config/rs6000/rs6000-protos.h (rldic_operand): Remove.
(includes_lshift64_p): Remove.
(includes_rldic_lshift_p): Declare.
(includes_rldicr_lshift_p): Declare.
* config/rs6000/rs6000.h (PREDICATE_CODES): Remove rldic_operand.
* config/rs6000/rs6000.md <ashldi3_internal 64 bit patterns>:
Replace match_operand rldic_operand predicate with
const_int_operand. Replace includes_lshift64_p condition with
includes_rldic_lshift_p.
<ashldi3_internal 64 bit rldicr patterns>: New.
2001-08-27 Andreas Jaeger <aj@suse.de>
* emit-rtl.c: Use VA_OPEN/VA_CLOSE/VA_FIXEDARG throughout.
......
gcc/config/rs6000/rs6000-protos.h
......@@ -60,7 +60,6 @@ extern int non_logical_cint_operand PARAMS ((rtx, enum machine_mode));
extern int logical_operand PARAMS ((rtx, enum machine_mode));
extern int mask_operand PARAMS ((rtx, enum machine_mode));
extern int mask64_operand PARAMS ((rtx, enum machine_mode));
extern int rldic_operand PARAMS ((rtx, enum machine_mode));
extern int and64_operand PARAMS ((rtx, enum machine_mode));
extern int and_operand PARAMS ((rtx, enum machine_mode));
extern int count_register_operand PARAMS ((rtx, enum machine_mode));
......@@ -86,7 +85,8 @@ extern int boolean_or_operator PARAMS ((rtx, enum machine_mode));
extern int min_max_operator PARAMS ((rtx, enum machine_mode));
extern int includes_lshift_p PARAMS ((rtx, rtx));
extern int includes_rshift_p PARAMS ((rtx, rtx));
extern int includes_lshift64_p PARAMS ((rtx, rtx));
extern int includes_rldic_lshift_p PARAMS ((rtx, rtx));
extern int includes_rldicr_lshift_p PARAMS ((rtx, rtx));
extern int registers_ok_for_quad_peep PARAMS ((rtx, rtx));
extern int addrs_ok_for_quad_peep PARAMS ((rtx, rtx));
extern enum reg_class secondary_reload_class PARAMS ((enum reg_class,
......
gcc/config/rs6000/rs6000.h
......@@ -2585,7 +2585,6 @@ do { \
{"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \
{"mask_operand", {CONST_INT}}, \
{"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"rldic_operand", {CONST_INT, CONST_DOUBLE}}, \
{"count_register_operand", {REG}}, \
{"xer_operand", {REG}}, \
{"call_operand", {SYMBOL_REF, REG}}, \
......
gcc/config/rs6000/rs6000.md
......@@ -6559,8 +6559,8 @@
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i"))
(match_operand:DI 3 "rldic_operand" "n")))]
"TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])"
(match_operand:DI 3 "const_int_operand" "n")))]
"TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])"
"rldic %0,%1,%H2,%W3")
(define_insn "ashldi3_internal5"
......@@ -6568,10 +6568,10 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "i,i"))
(match_operand:DI 3 "rldic_operand" "n,n"))
(match_operand:DI 3 "const_int_operand" "n,n"))
(const_int 0)))
(clobber (match_scratch:DI 4 "=r,r"))]
"TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])"
"TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])"
"@
rldic. %4,%1,%H2,%W3
#"
......@@ -6583,10 +6583,11 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
(match_operand:DI 3 "rldic_operand" ""))
(match_operand:DI 3 "const_int_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 4 ""))]
"TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3]) && reload_completed"
"TARGET_POWERPC64 && reload_completed
&& includes_rldic_lshift_p (operands[2], operands[3])"
[(set (match_dup 4)
(and:DI (ashift:DI (match_dup 1) (match_dup 2))
(match_dup 3)))
......@@ -6600,11 +6601,11 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "i,i"))
(match_operand:DI 3 "rldic_operand" "n,n"))
(match_operand:DI 3 "const_int_operand" "n,n"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])"
"TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])"
"@
rldic. %0,%1,%H2,%W3
#"
......@@ -6616,11 +6617,88 @@
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
(match_operand:DI 3 "rldic_operand" ""))
(match_operand:DI 3 "const_int_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3]) && reload_completed"
"TARGET_POWERPC64 && reload_completed
&& includes_rldic_lshift_p (operands[2], operands[3])"
[(set (match_dup 0)
(and:DI (ashift:DI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 4)
(compare:CC (match_dup 0)
(const_int 0)))]
"")
(define_insn "*ashldi3_internal7"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i"))
(match_operand:DI 3 "mask64_operand" "S")))]
"TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])"
"rldicr %0,%1,%H2,%S3")
(define_insn "ashldi3_internal8"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "i,i"))
(match_operand:DI 3 "mask64_operand" "S,S"))
(const_int 0)))
(clobber (match_scratch:DI 4 "=r,r"))]
"TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])"
"@
rldicr. %4,%1,%H2,%S3
#"
[(set_attr "type" "delayed_compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
(match_operand:DI 3 "mask64_operand" ""))
(const_int 0)))
(clobber (match_scratch:DI 4 ""))]
"TARGET_POWERPC64 && reload_completed
&& includes_rldicr_lshift_p (operands[2], operands[3])"
[(set (match_dup 4)
(and:DI (ashift:DI (match_dup 1) (match_dup 2))
(match_dup 3)))
(set (match_dup 0)
(compare:CC (match_dup 4)
(const_int 0)))]
"")
(define_insn "*ashldi3_internal9"
[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "i,i"))
(match_operand:DI 3 "mask64_operand" "S,S"))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])"
"@
rldicr. %0,%1,%H2,%S3
#"
[(set_attr "type" "delayed_compare")
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "")
(compare:CC
(and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "const_int_operand" ""))
(match_operand:DI 3 "mask64_operand" ""))
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "")
(and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"TARGET_POWERPC64 && reload_completed
&& includes_rldicr_lshift_p (operands[2], operands[3])"
[(set (match_dup 0)
(and:DI (ashift:DI (match_dup 1) (match_dup 2))
(match_dup 3)))
......
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