Commit c497c412 by Uros Bizjak

sse.md (*<sse>_maskcmp<mode>3_comm): New pattern.

	* config/i386/sse.md (*<sse>_maskcmp<mode>3_comm): New pattern.

From-SVN: r174224
parent e470affe
2011-05-25 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (*<sse>_maskcmp<mode>3_comm): New pattern.
2011-05-25 H.J. Lu <hongjiu.lu@intel.com> 2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.md (*movqi_extv_1)): Put back * config/i386/i386.md (*movqi_extv_1)): Put back
...@@ -6,8 +10,7 @@ ...@@ -6,8 +10,7 @@
2011-05-25 H.J. Lu <hongjiu.lu@intel.com> 2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
* doc/extend.texi (X86 Built-in Functions): Update pause * doc/extend.texi (X86 Built-in Functions): Update pause intrinsic.
intrinsic.
2011-05-25 Bernd Schmidt <bernds@codesourcery.com> 2011-05-25 Bernd Schmidt <bernds@codesourcery.com>
......
...@@ -1184,6 +1184,22 @@ ...@@ -1184,6 +1184,22 @@
(set_attr "prefix" "vex") (set_attr "prefix" "vex")
(set_attr "mode" "<ssescalarmode>")]) (set_attr "mode" "<ssescalarmode>")])
(define_insn "*<sse>_maskcmp<mode>3_comm"
[(set (match_operand:VF 0 "register_operand" "=x,x")
(match_operator:VF 3 "sse_comparison_operator"
[(match_operand:VF 1 "register_operand" "%0,x")
(match_operand:VF 2 "nonimmediate_operand" "xm,xm")]))]
"TARGET_SSE
&& GET_RTX_CLASS (GET_CODE (operands[3])) == RTX_COMM_COMPARE"
"@
cmp%D3<ssemodesuffix>\t{%2, %0|%0, %2}
vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "ssecmp")
(set_attr "length_immediate" "1")
(set_attr "prefix" "orig,vex")
(set_attr "mode" "<MODE>")])
(define_insn "<sse>_maskcmp<mode>3" (define_insn "<sse>_maskcmp<mode>3"
[(set (match_operand:VF 0 "register_operand" "=x,x") [(set (match_operand:VF 0 "register_operand" "=x,x")
(match_operator:VF 3 "sse_comparison_operator" (match_operator:VF 3 "sse_comparison_operator"
......
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