Commit c419f71c by Jeff Law Committed by Jeff Law

[PATCH] Fix undefined behaviour in arc port

	* config/arc/arc.c (arc_output_addsi): Fix left shift undefined
	behaviour.
	* config/arc/constraints.md (Cca, C2a): Fix left shift undefined
	behaviour.

From-SVN: r228166
parent a0a65802
2015-09-26 Jeff Law <law@redhat.com>
* config/arc/arc.c (arc_output_addsi): Fix left shift undefined
behaviour.
* config/arc/constraints.md (Cca, C2a): Fix left shift undefined
behaviour.
* config/sh/sh.h (CONST_OK_FOR_J16): Fix left shift undefined
behaviour
......@@ -7393,7 +7393,7 @@ arc_output_addsi (rtx *operands, bool cond_p, bool output_p)
int range_factor = neg_intval & intval;
int shift;
if (intval == -1 << 31)
if (intval == (HOST_WIDE_INT) (HOST_WIDE_INT_M1U << 31))
ADDSI_OUTPUT1 ("bxor%? %0,%1,31");
/* If we can use a straight add / sub instead of a {add,sub}[123] of
......@@ -9320,7 +9320,9 @@ arc_legitimize_reload_address (rtx *p, machine_mode mode, int opnum,
if ((scale-1) & offset)
scale = 1;
shift = scale >> 1;
offset_base = (offset + (256 << shift)) & (-512 << shift);
offset_base
= ((offset + (256 << shift))
& ((HOST_WIDE_INT)(-512U << shift)));
/* Sometimes the normal form does not suit DImode. We
could avoid that by using smaller ranges, but that
would give less optimized code when SImode is
......
......@@ -167,7 +167,7 @@
"@internal
Conditional or three-address add / sub constant"
(and (match_code "const_int")
(match_test "ival == -1 << 31
(match_test "ival == (HOST_WIDE_INT)(HOST_WIDE_INT_M1U << 31)
|| (ival >= -0x1f8 && ival <= 0x1f8
&& ((ival >= 0 ? ival : -ival)
<= 0x3f * (ival & -ival)))")))
......@@ -195,7 +195,7 @@
"@internal
Unconditional two-address add / sub constant"
(and (match_code "const_int")
(match_test "ival == -1 << 31
(match_test "ival == HOST_WIDE_INT (HOST_WIDE_INT_M1U << 31)
|| (ival >= -0x4000 && ival <= 0x4000
&& ((ival >= 0 ? ival : -ival)
<= 0x7ff * (ival & -ival)))")))
......
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