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riscv-gcc-1
Commit c127c127 by Kazu Hirata Committed by Jeff Law
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* h8300.md: Fix formatting. 

From-SVN: r35397
parent 1868b439
Showing with 18 additions and 22 deletions
gcc/ChangeLog
......@@ -130,6 +130,8 @@
2000-07-31 Kazu Hirata <kazu@hxi.com>
* h8300.md: Fix formatting.
* local-alloc.c: Fix formatting.
* h8300.c (get_shift_alg): Remove the variable alg.
......
gcc/config/h8300/h8300.md
......@@ -290,19 +290,18 @@
case 0:
return \"sub.w %e0,%e0\;sub.w %f0,%f0\";
case 1:
if (REGNO(operands[0]) < REGNO(operands[1]))
if (REGNO (operands[0]) < REGNO (operands[1]))
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
else
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
case 2:
/* Make sure we don't trample the register we index with. */
if (GET_CODE(operands[1]) == MEM)
if (GET_CODE (operands[1]) == MEM)
{
rtx inside = XEXP (operands[1],0);
if (REG_P (inside))
{
rn = REGNO(inside);
rn = REGNO (inside);
}
else if (GET_CODE (inside) == PLUS)
{
......@@ -351,20 +350,19 @@
|| register_operand (operands[1], SFmode))"
"*
{
/* Copy of the movsi stuff */
/* Copy of the movsi stuff. */
int rn = -1;
switch (which_alternative)
{
case 0:
return \"sub.w %e0,%e0\;sub.w %f0,%f0\";
case 1:
if (REGNO(operands[0]) < REGNO(operands[1]))
if (REGNO (operands[0]) < REGNO (operands[1]))
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
else
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
case 2:
/* Make sure we don't trample the register we index with. */
if (GET_CODE (operands[1]) == MEM)
{
rtx inside = XEXP (operands[1],0);
......@@ -381,14 +379,11 @@
}
}
if (rn == REGNO (operands[0]))
{
/* move the second word first */
/* Move the second word first. */
return \"mov.w %f1,%f0\;mov.w %e1,%e0\";
}
else
{
/* Move the first word first. */
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
}
case 3:
return \"mov.w %e1,%e0\;mov.w %f1,%f0\";
......@@ -430,13 +425,13 @@
number to zero in one of the two low bytes. */
if (val == (val & 0xff))
{
operands[1] = GEN_INT ((char)val & 0xff);
operands[1] = GEN_INT ((char) val & 0xff);
return \"sub.l %S0,%S0\;add.b %1,%w0\";
}
if (val == (val & 0xff00))
{
operands[1] = GEN_INT ((char)(val >> 8) & 0xff);
operands[1] = GEN_INT ((char) (val >> 8) & 0xff);
return \"sub.l %S0,%S0\;add.b %1,%x0\";
}
......@@ -1339,7 +1334,6 @@
(const_int 8)
(const_int 2)))])
;; ----------------------------------------------------------------------
;; JUMP INSTRUCTIONS
;; ----------------------------------------------------------------------
......@@ -1656,7 +1650,7 @@
(define_expand "zero_extendhisi2_h8300"
[(set (reg:HI 1) (match_operand:HI 1 "general_operand" ""))
(set (reg:SI 0) (zero_extend:SI (reg:HI 1)))
(set (match_operand:SI 0 "general_operand" "" ) (reg:SI 0))]
(set (match_operand:SI 0 "general_operand" "") (reg:SI 0))]
"TARGET_H8300"
"")
......@@ -1740,7 +1734,7 @@
(define_expand "extendhisi2_h8300"
[(set (reg:HI 1) (match_operand:HI 1 "general_operand" ""))
(set (reg:SI 0) (sign_extend:SI (reg:HI 1)))
(set (match_operand:SI 0 "general_operand" "" ) (reg:SI 0))]
(set (match_operand:SI 0 "general_operand" "") (reg:SI 0))]
"TARGET_H8300"
"")
......@@ -1896,7 +1890,7 @@
;; You'll never believe all these patterns perform one basic action --
;; load a bit from the source, optionally invert the bit, then store it
;; in the destination (which is known to be zero)..
;; in the destination (which is known to be zero).
;;
;; Combine obviously need some work to better identify this situation and
;; canonicalize the form better.
......@@ -2228,7 +2222,7 @@
[(set (match_operand:QI 0 "register_operand" "")
(mem:QI (match_operand:HI 1 "register_operand" "")))
(set (match_dup 1) (plus:HI (match_dup 1) (const_int 1)))]
"REGNO(operands[1]) != REGNO(operands[0])"
"REGNO (operands[1]) != REGNO (operands[0])"
"mov.b @%T1+,%X0"
[(set_attr "length" "2")
(set_attr "cc" "set_znv")])
......@@ -2237,7 +2231,7 @@
[(set (match_operand:HI 0 "register_operand" "")
(mem:HI (match_operand:HI 1 "register_operand" "")))
(set (match_dup 1) (plus:HI (match_dup 1) (const_int 2)))]
"REGNO(operands[1]) != REGNO(operands[0])"
"REGNO (operands[1]) != REGNO (operands[0])"
"mov.w @%T1+,%T0"
[(set_attr "length" "2")
(set_attr "cc" "set_znv")])
......@@ -2249,7 +2243,7 @@
(plus:HI (match_dup 1) (const_int -1)))
(set (mem:QI (match_dup 1))
(match_operand:QI 0 "register_operand" ""))]
"REGNO(operands[1]) != REGNO(operands[0])"
"REGNO (operands[1]) != REGNO (operands[0])"
"mov.b %X0,@-%T1"
[(set_attr "length" "2")
(set_attr "cc" "set_znv")])
......@@ -2259,7 +2253,7 @@
(plus:HI (match_dup 1) (const_int -2)))
(set (mem:HI (match_dup 1))
(match_operand:HI 0 "register_operand" ""))]
"REGNO(operands[1]) != REGNO(operands[0])"
"REGNO (operands[1]) != REGNO (operands[0])"
"mov.w %T0,@-%T1"
[(set_attr "length" "2")
(set_attr "cc" "set_znv")])
......
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